High-Performance Embedded Architectures and Compilers

© Springer

The LNCS Transactions on HiPEAC aims at timely dissemination of research contributions in computer architecture and compilation methods for high-performance and embedded computer systems.

All volumes in Transactions on HiPEAC

Scope

Recognizing the convergence of embedded and general-purpose computer systems, this LNCS Transactions publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases.
The scope of this publication therefore covers all aspects of computer architecture and code generation and compiler optimization methods which are of interest to researchers and practitioners designing future embedded systems.

Editorial Board

Editor-in-Chief

Per Stenström, Chalmers University of Technology, Sweden

Editorial Board

  • Koen De Bosschere, Ghent University, Belgium
  • Michael O'Boyle, University of Edinburgh, UK
  • Jose Duato, UPV, Spain
  • Georgi Gaydadjiev, University of Delft, The Netherlands
  • Manolis Katevenis, FORTH, Greece
  • Antonio Prete, University of Pisa, Italy
  • André Seznec, IRISA, France
  • Olivier Temam, INRIA, France
  • Theo Ungerer, University of Augsburg, Germany
  • Mateo Valero, UPC, Spain

Submission Information

Issues and Submissions
The LNCS Transactions on HiPEAC will have four issues per year of which about half of them focus on specific themes or topic areas – special issues. Prospective guest editors are welcome to propose themes for special issues.
The review process is managed by an editorial board of leading experts in the areas covered by the journal.