Skip to main content
Book cover

High-speed Serial Buses in Embedded Systems

  • Book
  • © 2020

Overview

  • Focuses on a collection of high-speed serial buses
  • Covers nine serial buses frequently used in embedded systems
  • Provides a detailed exploration of related protocols, including the physical layer, link synchronization, frame format, and application command
  • Offers step-by-step implementation guidelines, with FPGA project examples, analysis of RTL code, experimental results, and an in-depth optimization scheme not available elsewhere

This is a preview of subscription content, log in via an institution to check access.

Access this book

eBook USD 99.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 129.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 199.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

Licence this eBook for your library

Institutional subscriptions

Table of contents (9 chapters)

Keywords

About this book

This book describes the most frequently used high-speed serial buses in embedded systems, especially those used by FPGAs. These buses employ SerDes, JESD204, SRIO, PCIE, Aurora and SATA protocols for chip-to-chip and board-to-board communication, and CPCIE, VPX, FC and Infiniband protocols for inter-chassis communication. For each type, the book provides the bus history and version info, while also assessing its advantages and limitations. Furthermore, it offers a detailed guide to implementing these buses in FPGA design, from the physical layer and link synchronization to the frame format and application command. Given its scope, the book offers a valuable resource for researchers, R&D engineers and graduate students in computer science or electronics who wish to learn the protocol principles, structures and applications of high-speed serial buses.

Authors and Affiliations

  • The 10th Research Institute of CETC, Chengdu, China

    Feng Zhang

About the author

Dr. Zhang Feng is a Senior Engineer. His research areas include data recording systems such as CCD, SATA, SRIO, FC and CPCIE, as well as the design of embedded systems used in wireless communication, including SerDes, JESD204, Aurora, and VPX.

Bibliographic Information

Publish with us