Overview
- Exhaustively reviews key recent research into invasive computing and details methodologies for mapping applications
- Covers many different applications such as invasive computing and network resources for a static application graph, to NoC-based many-core architectures
- Presents techniques in a step-by-step manner, supported by examples and figures
- Includes supplementary material: sn.pub/extras
Part of the book series: Computer Architecture and Design Methodologies (CADM)
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Table of contents (7 chapters)
Keywords
About this book
The book provides extensive experimental evaluations, investigating the benefits of applying invasive computing and hybrid application mapping to give guarantees on non-functional properties such as timing, energy, and security. The techniques in this book are presented in a step-by-step manner, supported by examples and figures. All proposedideas for providing guarantees on performance, energy consumption, and security are enabled by using the concept of invasive computing and the exclusive usage of resources.
Authors and Affiliations
About the authors
Stefan Wildermann is a postdoctoral researcher at the Department of Hardware/Software Co-Design at Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany. He received his Diploma and Doctorate degrees in Computer Science from the FAU in 2006 and 2012. Since 2012, Stefan has been a research assistant, lecturer, and group leader at the FAU’s Department of Hardware/SoftwareCo-Design.
Michael Glaß is a Professor at the Institute of Embedded Systems/Real-Time Systems, Ulm University, Germany. From 2011 to 2016, he was an assistant professor and head of the System-level Design Automation group at the Department of Hardware/Software Co-Design, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany. He received his Diploma degree and Doctorate degree in Computer Science from the FAU, Germany, in 2006 and 2011, respectively. Michael’s main research interests are dependability engineering for embedded systems and system-level design automation, with a particular focus on formal analysis and design space exploration.
Jürgen Teich has headed the Department of Hardware/Software Co-Design at Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany, since 2003. He received his M.S. degree (Dipl.-Ing. with honors) from the University of Kaiserslautern, Germany in 1989 and his Ph.D. degree (Dr.-Ing., summa cum laude) from the University of Saarland, Germany, in 1993. In 1994, he joined the DSP design group under Prof. E. A. Lee at the Department of Electrical Engineering and Computer Sciences (EECS), University of California at Berkeley (postdoc). From 1995 to 1998, he held a position at the Institute of Computer Engineering and Communications Networks Laboratory (TIK), ETH Zurich, Switzerland. From 1998 to 2002, he was a Full Professor at the Electrical Engineering and Information Technology Department, University of Paderborn, Germany.
His current research focuses on the electronic design automation of embedded systems with an emphasis on hardware/software co-design, reconfigurable computing and multi-core systems. Prof. Teich has organized various ACM/IEEE conferences/symposia as Program Chair including CODES+ISSS´07, FPL´08, ASAP´10, and DATE´16. He regularly serves as a TPC member of many program committees. He has also served on the editorial board of journals including IEEE Design & TEST, ACM TODAES and JES, and has edited two textbooks on Hardware/Software Co-Design (Springer).
Bibliographic Information
Book Title: Invasive Computing for Mapping Parallel Programs to Many-Core Architectures
Authors: Andreas Weichslgartner, Stefan Wildermann, Michael Glaß, Jürgen Teich
Series Title: Computer Architecture and Design Methodologies
DOI: https://doi.org/10.1007/978-981-10-7356-4
Publisher: Springer Singapore
eBook Packages: Engineering, Engineering (R0)
Copyright Information: The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2018
Hardcover ISBN: 978-981-10-7355-7Published: 20 January 2018
Softcover ISBN: 978-981-13-5622-3Published: 23 December 2018
eBook ISBN: 978-981-10-7356-4Published: 29 December 2017
Series ISSN: 2367-3478
Series E-ISSN: 2367-3486
Edition Number: 1
Number of Pages: XXII, 164
Number of Illustrations: 3 b/w illustrations, 77 illustrations in colour
Topics: Circuits and Systems, Processor Architectures, Electronic Circuits and Devices