Transactions on High-Performance Embedded Architectures and Compilers

Transactions on High-Performance Embedded Architectures and Compilers V

Editors: Editor-in-chief: Stenström, Per
Silvano, Cristina, Bertels, Koen, Schulte, Michael (Eds.)

Free Preview
  • Original research on systems targeted at specific computing tasks  Of interest to researchers and practitioners designing future embedded systems
  • Covers all aspects of computer architecture, code generation and compiler optimization methods
Show all benefits

Buy this book

eBook n/a
  • ISBN 978-3-662-58834-5
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
Softcover n/a
  • ISBN 978-3-662-58833-8
  • Free shipping for individuals worldwide
About this book

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer  architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems.
This 5th issue  contains extended versions of papers by the best paper award candidates of IC-SAMOS 2009 and the SAMOS 2009 Workshop, colocated events of the 9th International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS 2009, held in Samos, Greece, in 2009. The 7 papers included in this volume were carefully reviewed and selected. The papers cover research on embedded processor hardware/software design and integration and present challenging research trends.

Table of contents (7 chapters)

Table of contents (7 chapters)
  • Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards

    Membarth, Richard (et al.)

    Pages 1-20

  • Programmable and Scalable Architecture for Graphics Processing Units

    de La Lama, Carlos S. (et al.)

    Pages 21-38

  • Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs

    Bijlsma, Tjerk (et al.)

    Pages 39-58

  • A Hardware-Accelerated Estimation-Based Power Profiling Unit - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management

    Genser, Andreas (et al.)

    Pages 59-78

  • The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors

    Carpenter, Paul M. (et al.)

    Pages 79-99

Buy this book

eBook n/a
  • ISBN 978-3-662-58834-5
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
Softcover n/a
  • ISBN 978-3-662-58833-8
  • Free shipping for individuals worldwide
Loading...

Recommended for you

Loading...

Bibliographic Information

Bibliographic Information
Book Title
Transactions on High-Performance Embedded Architectures and Compilers V
Editors
  • Per Stenström
  • Cristina Silvano
  • Koen Bertels
  • Michael Schulte
Series Title
Transactions on High-Performance Embedded Architectures and Compilers
Series Volume
11225
Copyright
2019
Publisher
Springer-Verlag Berlin Heidelberg
Copyright Holder
Springer-Verlag GmbH Germany, part of Springer Nature
eBook ISBN
978-3-662-58834-5
DOI
10.1007/978-3-662-58834-5
Softcover ISBN
978-3-662-58833-8
Series ISSN
1864-306X
Edition Number
1
Number of Pages
IX, 141
Number of Illustrations
52 b/w illustrations, 36 illustrations in colour
Topics