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Reconfigurable Computing: Architectures, Tools and Applications

7th International Symposium, ARC 2011, Belfast, UK, March 23-25, 2011, Proceedings

  • Conference proceedings
  • © 2011

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Editors:
  1. Andreas Koch

    1. FB 20 Informatik, Technische Universität Darmstadt, Darmstadt, Germany

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  2. Ram Krishnamurthy

    1. Intel Corp., Hillsboro, USA

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  3. John McAllister

    1. School of Electronics, Electrical Engineering and Computer Science, Institute of Electronics, Communications and Information Technology, Queen’s University of Belfast, Belfast, UK

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  4. Roger Woods

    1. School of Electronics, Electrical Engineering and Computer Science, Institute of Electronics, Communications and Information Technology, Queen’s University of Belfast, Belfast, UK

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  5. Tarek El-Ghazawi

    1. Department of Electrical and Computer Engineering, George Washington University, USA

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 6578)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

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Conference proceedings info: ARC 2011.

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Table of contents (40 papers)

  1. Front Matter

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  3. Reconfigurable Accelerators I

    1. A Reconfigurable Audio Beamforming Multi-Core Processor

      • Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi Gaydadjiev
      Pages 3-15

    2. A Regular Expression Matching Circuit Based on a Decomposed Automaton

      • Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura
      Pages 16-28

    3. Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios

      • Michael Grand, Lilian Bossuet, Bertrand Le Gal, Guy Gogniat, Dominique Dallet
      Pages 29-40

  4. Design Tools

    1. Application Specific Memory Access, Reuse and Reordering for SDRAM

      • Samuel Bayliss, George A. Constantinides
      Pages 41-52

    2. Automatic Generation of FPGA-Specific Pipelined Accelerators

      • Christophe Alias, Bogdan Pasca, Alexandru Plesco
      Pages 53-66

    3. HLS Tools for FPGA: Faster Development with Better Performance

      • Alexandre Cornu, Steven Derrien, Dominique Lavenier
      Pages 67-78

  5. Posters 1

    1. A (Fault-Tolerant)2 Scheduler for Real-Time HW Tasks

      • Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Mikel Azkarate, Imanol Martinez
      Pages 79-87

    2. A Compact Gaussian Random Number Generator for Small Word Lengths

      • Subhasis Das, Sachin Patkar
      Pages 88-93

    3. Accurate Floating Point Arithmetic through Hardware Error-Free Transformations

      • Manouk V. Manoukian, George A. Constantinides
      Pages 94-101

    4. Active Storage Networks for Accelerating K-Means Data Clustering

      • Janardhan Singaraju, John A. Chandy
      Pages 102-109

    5. An FPGA Implementation for Texture Analysis Considering the Real-Time Requirements of Vision-Based Systems

      • Mario-Alberto Ibarra-Manzano, Dora-Luz Almanza-Ojeda
      Pages 110-117

    6. CReAMS: An Embedded Multiprocessor Platform

      • Mateus B. Rutzig, Antonio Carlos S. Beck, Luigi Carro
      Pages 118-124

    7. Dataflow Graph Partitioning for Optimal Spatio-Temporal Computation on a Coarse Grain Reconfigurable Architecture

      • Ratna Krishnamoorthy, Keshavan Varadarajan, Masahiro Fujita, Mythri Alle, S. K. Nandy, Ranjani Narayan
      Pages 125-132

  6. Reconfigurable Processors

    1. A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection

      • Xuezheng Chu, John McAllister, Roger Woods
      Pages 133-144

    2. Design, Implementation, and Verification of an Adaptable Processor in Lava HDL

      • Stefan Schulze, Sergei Sawitzki
      Pages 145-156

    3. Towards an Adaptable Multiple-ISA Reconfigurable Processor

      • Jair Fajardo Junior, Mateus B. Rutzig, Antonio C. S. Beck, Luigi Carro
      Pages 157-168

  7. Applications

    1. FPGA-Based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments

      • Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch
      Pages 169-180
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About this book

This book constitutes the refereed proceedings of the 7th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2011, held in Belfast, UK, in March 2011. The 40 revised papers presented, consisting of 24 full papers, 14 poster papers, and the abstracts of 2 plenary talks, were carefully reviewed and selected from 88 submissions. The topics covered are reconfigurable accelerators, design tools, reconfigurable processors, applications, device architecture, methodology and simulation, and system architecture.

Editors and Affiliations

  • FB 20 Informatik, Technische Universität Darmstadt, Darmstadt, Germany

    Andreas Koch

  • Intel Corp., Hillsboro, USA

    Ram Krishnamurthy

  • School of Electronics, Electrical Engineering and Computer Science, Institute of Electronics, Communications and Information Technology, Queen’s University of Belfast, Belfast, UK

    John McAllister, Roger Woods

  • Department of Electrical and Computer Engineering, George Washington University, USA

    Tarek El-Ghazawi

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