Automated Technology for Verification and Analysis

1. Front Matter

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2. Keynote Speeches

   1. Analysis of Recursive Probabilistic Models

      • Mihalis Yannakakis

      Pages 1-5

   2. Verification Challenges and Opportunities in the New Era of Microprocessor Design

      • Jin Yang

      Pages 6-7

   3. Automated Abstraction of Software

      • Thomas Ball

      Pages 8-8

3. Regular Papers

   1. Symmetry Reduction for Probabilistic Model Checking Using Generic Representatives

      • Alastair F. Donaldson, Alice Miller

      Pages 9-23

   2. Eager Markov Chains

      • Parosh Aziz Abdulla, Noomene Ben Henda, Richard Mayr, Sven Sandberg

      Pages 24-38

   3. A Probabilistic Learning Approach for Counterexample Guided Abstraction Refinement

      • Fei He, Xiaoyu Song, Ming Gu, Jiaguang Sun

      Pages 39-50

   4. A Fine-Grained Fullness-Guided Chaining Heuristic for Symbolic Reachability Analysis

      • Ming-Ying Chung, Gianfranco Ciardo, Andy Jinqing Yu

      Pages 51-66

   5. Model Checking Timed Systems with Urgencies

      • Pao-Ann Hsiung, Shang-Wei Lin, Yean-Ru Chen, Chun-Hsian Huang, Jia-Jen Yeh, Hong-Yu Sun et al.

      Pages 67-81

   6. Whodunit? Causal Analysis for Counterexamples

      • Chao Wang, Zijiang Yang, Franjo Ivančić, Aarti Gupta

      Pages 82-95

   7. On the Membership Problem for Visibly Pushdown Languages

      • Salvatore La Torre, Margherita Napoli, Mimmo Parente

      Pages 96-109

   8. On the Construction of Fine Automata for Safety Properties

      • Orna Kupferman, Robby Lampert

      Pages 110-124

   9. On the Succinctness of Nondeterminism

      • Benjamin Aminof, Orna Kupferman

      Pages 125-140

   10. Efficient Algorithms for Alternating Pushdown Systems with an Application to the Computation of Certificate Chains

       • Dejvuth Suwimonteerabuth, Stefan Schwoon, Javier Esparza

       Pages 141-153

   11. Compositional Reasoning for Hardware/Software Co-verification

       • Fei Xie, Guowu Yang, Xiaoyu Song

       Pages 154-169

   12. Learning-Based Symbolic Assume-Guarantee Reasoning with Automatic Decomposition

       • Wonhong Nam, Rajeev Alur

       Pages 170-185

   13. On the Satisfiability of Modular Arithmetic Formulae

       • Bow-Yaw Wang

       Pages 186-199

   14. Selective Approaches for Solving Weak Games

       • Malte Helmert, Robert Mattmüller, Sven Schewe

       Pages 200-214

   15. Controller Synthesis and Ordinal Automata

       • Thierry Cachat

       Pages 215-228

   16. Effective Contraction of Timed STGs for Decomposition Based Timed Circuit Synthesis

       • Tomohiro Yoneda, Chris J. Myers

       Pages 229-244

The Automated Technology for Veri?cation and Analysis (ATVA) international symposium series was initiated in 2003, responding to a growing interest in formal veri?cation spurred by the booming IT industry, particularly hardware design and manufacturing in East Asia. Its purpose is to promote research on automated veri?cation and analysis in the region by providing a forum for int- action between the regional and the international research/industrial commu- ties of the ?eld. ATVA 2006, the fourth of the ATVA series, was held in Beijing, China, October 23-26, 2006. The main topics of the symposium include th- ries useful for providing designers with automated support for obtaining correct software or hardware systems, as well as the implementation of such theories in tools or their application. This year, we received a record number of papers: a total of 137 submissions from 27 countries. Each submission was assigned to three Program Comm- tee members, who could request help from subreviewers, for rigorous and fair evaluation. The ?nal deliberation by the Program Committee was conducted through Springer’s Online Conference Service for a duration of about 10 days after nearly all review reports had been collected. In the end, 35 papers were selected for inclusion in the program. ATVA 2006 had three keynote speeches given respectively by Thomas Ball, Jin Yang, and Mihalis Yannakakis. The main symposium was preceded by a tutorial day, consisting of three two-hourlectures given by the keynotespeakers.

• Bisimulation
• algorithm
• algorithms
• automata
• construction
• embedded systems
• formal methods
• formal performance analysis
• hardware verification
• microprocessor
• model
• model checking
• oetri nets
• probabilistic models
• verification

• VERIMAG, Grenoble-Gières, France

  Susanne Graf

• Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing, China

  Wenhui Zhang

Policies and ethics