Cryptographic Hardware and Embedded Systems - CHES 2006

1. Front Matter

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2. Side Channels I

   1. Template Attacks in Principal Subspaces

      • C. Archambeau, E. Peeters, F. -X. Standaert, J. -J. Quisquater

      Pages 1-14

   2. Templates vs. Stochastic Methods

      • Benedikt Gierlichs, Kerstin Lemke-Rust, Christof Paar

      Pages 15-29

   3. Towards Security Limits in Side-Channel Attacks

      • F. -X. Standaert, E. Peeters, C. Archambeau, J. -J. Quisquater

      Pages 30-45

3. Low Resources

   1. HIGHT: A New Block Cipher Suitable for Low-Resource Device

      • Deukjo Hong, Jaechul Sung, Seokhie Hong, Jongin Lim, Sangjin Lee, Bon-Seok Koo et al.

      Pages 46-59

4. Invited Talk I

   1. Integer Factoring Utilizing PC Cluster

      • Kazumaro Aoki

      Pages 60-60

5. Hardware Attacks and Countermeasures I

   1. Optically Enhanced Position-Locked Power Analysis

      • Sergei Skorobogatov

      Pages 61-75

   2. Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations

      • Stefan Mangard, Kai Schramm

      Pages 76-90

   3. A Generalized Method of Differential Fault Attack Against AES Cryptosystem

      • Amir Moradi, Mohammad T. Manzuri Shalmani, Mahmoud Salmasizadeh

      Pages 91-100

6. Special Purpose Hardware

   1. Breaking Ciphers with COPACOBANA –A Cost-Optimized Parallel Code Breaker

      • Sandeep Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler

      Pages 101-118

   2. Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware

      • Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin et al.

      Pages 119-133

7. Efficient Algorithms for Embedded Processors

   1. Implementing Cryptographic Pairings on Smartcards

      • Michael Scott, Neil Costigan, Wesam Abdulwahab

      Pages 134-147

   2. SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form

      • Toru Akishita, Masanobu Katagi, Izuru Kitamura

      Pages 148-159

   3. Fast Generation of Prime Numbers on Portable Devices: An Update

      • Marc Joye, Pascal Paillier

      Pages 160-173

8. Side Channels II

   1. A Proposition for Correlation Power Analysis Enhancement

      • Thanh-Ha Le, Jessy Clédière, Cécile Canovas, Bruno Robisson, Christine Servière, Jean-Louis Lacoume

      Pages 174-186

   2. High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching

      • Naofumi Homma, Sei Nagashima, Yuichi Imai, Takafumi Aoki, Akashi Satoh

      Pages 187-200

   3. Cache-Collision Timing Attacks Against AES

      • Joseph Bonneau, Ilya Mironov

      Pages 201-215

   4. Provably Secure S-Box Implementation Based on Fourier Transform

      • Emmanuel Prouff, Christophe Giraud, Sébastien Aumônier

      Pages 216-230

9. Invited Talk II

   1. The Outer Limits of RFID Security

      • Ari Juels

      Pages 231-231

10. Hardware Attacks and Countermeasures II

    1. Three-Phase Dual-Rail Pre-charge Logic

       • Marco Bucci, Luca Giancane, Raimondo Luzzi, Alessandro Trifiletti

       Pages 232-241

These are the proceedings of the Eighth Workshop on Cryptographic Hardware and Embedded Systems (CHES 2006) held in Yokohama, Japan, October 10-13, 2006. The CHES workshophas been sponsored by the International Association for Cryptographic Research (IACR) since 2004. The ?rst and the second CHES workshops were held in Worcester in 1999 and 2000, respectively, followed by Paris in 2001, San Francisco Bay Area in 2002, Cologne in 2003, Boston in 2004 and Edinburgh in 2005. This is the ?rst CHES workshop held in Asia. This year,a totalof 112 paper submissionswerereceived.The reviewprocess was therefore a delicate and challenging task for the Program Committee m- bers. Each paper was carefully read by at least three reviewers, and submissions with a Program Committee member as a (co-)author by at least ?ve reviewers. The review process concluded with a two week Web discussion process which resulted in 32 papers being selected for presentation. Unfortunately, there were a number of good papers that could not be included in the program due to a lack of space. We would like to thank all the authors who submitted papers to CHES 2006. In addition to regular presentations, we were very fortunate to have in the programthreeexcellentinvitedtalksgivenbyKazumaroAoki(NTT)on“Integer Factoring Utilizing PC Cluster,” Ari Juels (RSA Labs) on “The Outer Limits of RFID Security” and Ahmad Sadeghi (Ruhr University Bochum) on “Challenges for Trusted Computing.” The program also included a rump session, chaired by Christof Paar, featuring informal presentations on recent results.

• Code
• RFID security
• RSA
• RSA public keys
• Radio-Frequency Identification (RFID)
• Resolution
• Switch
• cipher implementation
• cryptanalysis
• cryptographic hardware
• embedded systems
• fault attacks
• logic
• network security
• security

• Versailles Saint-Quentin-en-Yvelines University, Versailles Cedex, France

  Louis Goubin

• Information Technology R&D Center, Mitsubishi Electric Corporation, Japan

  Mitsuru Matsui

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