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Lecture Notes in Computer Science

Correct Hardware Design and Verification Methods

11th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2001 Livingston, Scotland, UK, September 4-7, 2001 Proceedings

Editors: Margaria, Tiziana, Melham, Tom (Eds.)

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About this book

This volume contains the proceedings of CHARME 2001, the Eleventh Advanced Research Working Conference on Correct Hardware Design and Veri?cation Methods. CHARME 2001 is the 11th in a series of working conferences devoted to the development and use of leading-edge formal techniques and tools for the design and veri?cation of hardware and hardware-like systems. Previous events in the ‘CHARME’ series were held in Bad Herrenalb (1999), Montreal (1997), Frankfurt (1995), Arles (1993), and Torino (1991). This series of meetings has been organized in cooperation with IFIP WG 10.5 and WG 10.2. Prior meetings, stretching backto the earliest days of formal hardware veri?cation, were held under various names in Miami (1990), Leuven (1989), Glasgow (1988), Grenoble (1986), Edinburgh (1985), and Darmstadt (1984). The convention is now well-established whereby the European CHARME conference alternates with its biennial counterpart, the International Conference on Formal Methods in Computer-Aided Design (FMCAD), which is held on even-numbered years in the USA. The conference tookplace during 4–7 September 2001 at the Institute for System Level Integration in Livingston, Scotland. It was co-hosted by the - stitute and the Department of Computing Science of Glasgow University and co-sponsored by the IFIP TC10/WG10.5 Working Group on Design and En- neering of Electronic Systems. CHARME 2001 also included a scienti?c session and social program held jointly with the 14th International Conference on Th- rem Proving in Higher Order Logics (TPHOLs), which was co-located in nearby Edinburgh.

Table of contents (35 chapters)

Table of contents (35 chapters)
  • View from the Fringe of the Fringe

    Pages 1-12

    Johnson, Steven D.

  • Hardware Synthesis Using SAFL and Application to Processor Design

    Pages 13-39

    Mycroft, Alan (et al.)

  • Applications of Hierarchical Verification in Model Checking

    Pages 40-57

    Beers, Robert (et al.)

  • Pruning Techniques for the SAT-Based Bounded Model Checking Problem

    Pages 58-70

    Shtrichman, Ofer

  • Heuristics for Hierarchical Partitioning with Application to Model Checking

    Pages 71-85

    Möller, M. Oliver (et al.)

Buy this book

eBook $84.99
price for USA in USD (gross)
  • ISBN 978-3-540-44798-6
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Softcover $109.99
price for USA in USD
  • ISBN 978-3-540-42541-0
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Correct Hardware Design and Verification Methods
Book Subtitle
11th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2001 Livingston, Scotland, UK, September 4-7, 2001 Proceedings
Editors
  • Tiziana Margaria
  • Tom Melham
Series Title
Lecture Notes in Computer Science
Series Volume
2144
Copyright
2001
Publisher
Springer-Verlag Berlin Heidelberg
Copyright Holder
Springer-Verlag Berlin Heidelberg
eBook ISBN
978-3-540-44798-6
DOI
10.1007/3-540-44798-9
Softcover ISBN
978-3-540-42541-0
Series ISSN
0302-9743
Edition Number
1
Number of Pages
XII, 488
Topics