Programming and Software Engineering

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings

Editors: Paliouras, Vassilis, Vounckx, Johan, Verkest, Diederik (Eds.)

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About this book

Welcome to the proceedings of PATMOS 2005, the 15th in a series of international workshops.PATMOS2005wasorganizedbyIMECwithtechnicalco-sponsorshipfrom the IEEE Circuits and Systems Society. Over the years, PATMOS has evolved into an important European event, where - searchers from both industry and academia discuss and investigate the emerging ch- lenges in future and contemporary applications, design methodologies, and tools - quired for the developmentof upcominggenerationsof integrated circuits and systems. The technical program of PATMOS 2005 contained state-of-the-art technical contri- tions, three invited talks, a special session on hearing-aid design, and an embedded - torial. The technical program focused on timing, performance and power consumption, as well as architectural aspects with particular emphasis on modeling, design, char- terization, analysis and optimization in the nanometer era. The Technical Program Committee, with the assistance of additional expert revi- ers, selected the 74 papers to be presented at PATMOS. The papers were divided into 11 technical sessions and 3 poster sessions. As is always the case with the PATMOS workshops, the review process was anonymous, full papers were required, and several reviews were carried out per paper. Beyond the presentations of the papers, the PATMOS technical program was - riched by a series of speeches offered by world class experts, on important emerging research issues of industrial relevance. Prof. Jan Rabaey, Berkeley, USA, gave a talk on “Traveling the Wild Frontier of Ulta Low-Power Design”, Dr. Sung Bae Park, S- sung, gave a presentation on “DVL (Deep Low Voltage): Circuits and Devices”, Prof.

Table of contents (49 chapters)

Table of contents (49 chapters)
  • A Power-Efficient and Scalable Load-Store Queue Design

    Castro, Fernando (et al.)

    Pages 1-9

  • Power Consumption Reduction Using Dynamic Control of Micro Processor Performance

    Rios-Arambula, David (et al.)

    Pages 10-18

  • Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications

    Manet, Philippe (et al.)

    Pages 19-29

  • Dynamic Instruction Cascading on GALS Microprocessors

    Sasaki, Hiroshi (et al.)

    Pages 30-39

  • Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width

    Miñana, Guadalupe (et al.)

    Pages 40-48

Buy this book

eBook $139.00
price for USA in USD (gross)
  • ISBN 978-3-540-32080-7
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Softcover $179.00
price for USA in USD
  • ISBN 978-3-540-29013-1
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Book Subtitle
15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings
Editors
  • Vassilis Paliouras
  • Johan Vounckx
  • Diederik Verkest
Series Title
Programming and Software Engineering
Series Volume
3728
Copyright
2005
Publisher
Springer-Verlag Berlin Heidelberg
Copyright Holder
Springer-Verlag Berlin Heidelberg
eBook ISBN
978-3-540-32080-7
DOI
10.1007/11556930
Softcover ISBN
978-3-540-29013-1
Edition Number
1
Number of Pages
XVI, 756
Topics