Skip to main content
SpringerLink
Log in
Book cover
  • Conference proceedings
  • © 1986

VLSI Algorithms and Architectures

Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings

Editors:

  1. Filia Makedon
    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  2. Kurt Mehlhorn
    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  3. T. Papatheodorou
    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  4. P. Spirakis
    View editor publications

    You can also search for this editor in PubMed   Google Scholar

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 227)

Sections

Buy it now

Softcover Book USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

This is a preview of subscription content, log in via an institution to check for access.

Table of contents (29 papers)

  1. Front Matter

    PDF

  2. Digital filtering in VLSI

    • G. Bilardi, F. P. Preparata
    Pages 1-11

  3. Two processor scheduling is in NC

    • David Helmbold, Ernst Mayr
    Pages 12-25

  4. Breaking symmetry in synchronous networks

    • Greg N. Frederickson, Nicola Santoro
    Pages 26-33

  5. Parallel ear decomposition search (EDS) and st-numbering in graphs

    • Yael Maon, Baruch Schieber, Uzi Vishkin
    Pages 34-45

  6. A unifying framework for systolic designs

    • Concettina Guerra
    Pages 46-56

  7. Optimal tradeoffs for addition on systolic arrays

    • Alok Aggarwal, J. Lawrence Carter, S. Rao Kosaraju
    Pages 57-69

  11. Nonsequential computation and laws of nature

    • Paul M. B. Vitángi
    Pages 108-120

  12. Linear algorithms for two CMOS layout problems

    • Rolf Müller, Thomas Lengauer
    Pages 121-132

  14. Efficient modular design of TSC checkers for m-out-of-2m codes

    • A. M. Paschalis, D. Nikolos, C. Halatsis
    Pages 144-155

  16. A high-performance single-chip vlsi signal processor architecture

    • Nick Kanopoulos, Peter N. Marinos
    Pages 166-179

  17. Exploiting hierarchy in VLSI design

    • T. Lengauer
    Pages 180-193

  19. Parallel tree techniques and code optimization

    • Eliezer Dekel, Simeon Ntafos, Shie-Tung Peng
    Pages 205-216

  20. AT2-optimal galois field multiplier for VLSI

    • Martin Fürer, Kurt Mehlhorn
    Pages 217-225
Back to top

Keywords

Back to top

Bibliographic Information

Back to top

Publish with us

Policies and ethics

Back to top
Access via your institution

Buy it now

Softcover Book USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

Search

Navigation