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Advanced Techniques for Power, Energy, and Thermal Management for Clustered Manycores

Authors: Pagani, S., Chen, J.-J., Shafique, M., Henkel, J.

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  • Provides a comprehensive introduction to energy, power, and temperature management, highlighting the different optimization goals, particularly computational performance, power and energy consumption, and temperature
  • Highlights the differences and similarities between the two key challenges of performance optimization under power or thermal constraints and energy minimization under performance constraints
  • Discusses in detail several means that can be used to optimize performance or energy while satisfying the desired constraints, including core heterogeneity, task-to-core assignment/mapping, dynamic power management (DPM), and dynamic voltage and frequency scaling (DVFS)
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About this book

This book focuses on two of the most relevant problems related to power management on multicore and manycore systems. Specifically, one part of the book focuses on maximizing/optimizing computational performance under power or thermal constraints, while another part focuses on minimizing energy consumption under performance (or real-time) constraints.

About the authors

Santiago Pagani is currently a Staff Firmware Engineer & Team Lead at ARM Ltd. (Cambridge, united Kingdom), where he runs an Agile firmware development team working on key components for the next generation Mali GPU products. He received his Diploma in Electronics Engineering from the National Technological University (UTN), Argentina, in 2010. He received his Ph.D. in Computer Science from the Karlsruhe Institute of Technology (KIT) with "Summa cum Laude" in 2016. From 2003 until 2012, he worked as a hardware and software developer in the industry sector for several companies in Argentina, including 2 years as a technical group leader. From 2012 until 2017, he worked as a research scientist (doctoral researcher and later post-doc) as part of the research staff at KIT. He received two Best Paper Awards (IEEE RTCSA in 2013 and IEEE/ACM CODES+ISSS in 2014), one Feature Paper of the Month (IEEE Transactions on Computers in 2017), and three HiPEAC Paper Awards. He received the 2017 ACM SIGBED "Paul Caspi Memorial Dissertation Award" in recognition of an outstanding Ph.D. dissertation. His interests include embedded systems, real-time systems, energy-efficient scheduling, temperature-aware scheduling, and power-aware designs.

Jian-Jia Chen is a Professor of Computer Science at TU Dortmund, Germany. Prior to his current position, he was with the Department of Informatics at Karlsruhe Institute of Technology (KIT) in Germany as a Junior Professor for Institute for Process Control and Robotics (IPR). He received his B.S. degree from the Department of Chemistry at National Taiwan University 2001. He obtained his Ph.D degree in June 2006 with Ph.D Dissertation "Energy-Efficient Scheduling for Real-Time Tasks in Uniprocessor and Homogeneous Multiprocessor Systems.”

Between Jan. 2008 and April 2010, he was a postdoc researcher at Computer Engineering and Networks Laboratory (TIK) in Swiss Federal Institute of Technology (ETH) Zurich, Switzerland. Dr. Chen's research interests include real-time systems, embedded systems, energy-efficient and power-aware designs, reliability system designs, and design automation.

He has published more than 175 research papers in prestigious journals and conferences in the areas of real-time embedded systems, lower-power system designs, and distributed computing. He has served as TPC member in several international conferences in real-time and embedded systems such as (RTSS, RTAS, RTCSA, DATE, ICCAD, etc.), and associate editors and guest editors in international journals.

Muhammad Shafique (M’11, SM’16) is a full professor at the Institute of Computer Engineering, Department of Informatics, Vienna University of Technology (TU Wien), Austria. He is directing the Group on Computer Architecture and Robust, Energy-Efficient Technologies (CARE-Tech). He was a senior research group leader at Karlsruhe Institute of Technology (KIT), Germany for more than 5 years. He received his Ph.D. in Computer Science from KIT in January 2011. Before, he was with Streaming Networks Pvt. Ltd. where he was involved in research and development of advanced video coding systems for several years.

His research interests are in computer architecture, power- and energy-efficient systems, robust computing covering various aspects of dependability and fault-tolerance, hardware security, emerging computing trends like neuromorphic and approximate computing, neurosciences, emerging technologies and nanosystems, self-learning and intelligent/cognitive systems, FPGAs, MPSoCs, and embedded systems. His research has a special focus on cross-layer analysis, modeling, design, and optimization of computing and memory systems covering various layers of the hardware and software stacks, as well as their integration in application use cases from Internet-of-Things (IoT), Cyber-Physical Systems (CPS), and ICT for Development (ICT4D) domains.

Dr. Shafique received the prestigious 2015 ACM/SIGDA Outstanding New Faculty Award, six gold medals in educational career, and several best paper awards and nominations at prestigious conferences like DATE, DAC, ICCAD and CODES+ISSS, Best Master Thesis Award, and Best Lecturer Award. He has given several Invited Talks, Tutorials, and Keynotes. He has also organized many special sessions at premier venues (like DAC, ICCAD, DATE, and ESWeek) and served as the Guest Editor for IEEE Design and Test Magazine (D&T) and IEEE Transactions on Sustainable Computing (T-SUSC). He has served as the TPC co-Chair of ESTIMedia and LPDC, General Chair of ESTIMedia, and Track Chair at DATE and FDL. He has served on the program committees of several IEEE/ACM conferences like ICCAD, ISCA, DATE, CASES, FPL, and ASPDAC. He is a senior member of the IEEE and IEEE Signal Processing Society (SPS), and a member of ACM, SIGARCH, SIGDA, SIGBED, and HiPEAC. He holds one US patent and over 180 papers in premier journals and conferences.

Professor Jörg Henkel is with Karlsruhe Institute of Technology (KIT), Germany, where he is directing the Chair for Embedded Systems CES. Before, he was a Senior Research Staff Member at NEC Laboratories in Princeton, NJ. He received his PhD from Braunschweig University with "Summa cum Laude".

Prof. Henkel has/is organizing various embedded systems and low power ACM/IEEE conferences/symposia as General Chair and Program Chair and was a Guest Editor on these topics in various Journals like the IEEE Computer Magazine. He was Program Chair of CODES'01, RSP'02, ISLPED’06, SIPS'08, CASES'09, Estimedia'11, VLSI Design'12, ICCAD’12, PATMOS’13, NOCS’14 and served as General Chair for CODES'02, ISLPED’09, Estimedia’12, ICCAD’13 and ESWeek'16. He is/has been a steering committee member of major conferences in the embedded systems field like at ICCAD, ESWeek, ISLPED, Codes+ISSS, CASES and is/has been an editorial board member of various journals like the IEEE TVLSI, IEEE TCAD, IEEE TMSCS, ACM TCPS, JOLPE etc.

In recent years, Profesor Henkel has given more than ten keynotes at various international conferences primarily with focus on embedded systems dependability. He has given full/half-day tutorials at leading conferences like DAC, ICCAD, DATE etc. Prof. Henkel received the 2008 DATE Best Paper Award, the 2009 IEEE/ACM William J. Mc Calla ICCAD Best Paper Award, the Codes+ISSS 2015, 2014, and 2011 Best Paper Awards, and the MaXentric Technologies AHS 2011 Best Paper Award as well as the DATE 2013 Best IP Award and the DAC 2014 Designer Track Best Poster Award. He is the Chairman of the IEEE Computer Society, Germany Section, and was the Editor-in-Chief of the ACM Transactions on Embedded Computing Systems (ACM TECS) for two consecutive terms. He is an initiator and the coordinator of the German Research Foundation's (DFG) program on 'Dependable Embedded Systems' (SPP 1500). He is the site coordinator (Karlsruhe site) of the Three-University Collaborative Research Center on "Invasive Computing" (DFG TR89). He is the Editor-in-Chief of the IEEE Design & Test Magazine. He holds ten US patents and is a Fellow of the IEEE.

Table of contents (11 chapters)

Table of contents (11 chapters)
  • Introduction

    Pages 1-22

    Pagani, Santiago (et al.)

  • Background and Related Work

    Pages 23-34

    Pagani, Santiago (et al.)

  • System Model

    Pages 35-50

    Pagani, Santiago (et al.)

  • Experimental Framework

    Pages 51-57

    Pagani, Santiago (et al.)

  • Thermal Safe Power (TSP)

    Pages 59-92

    Pagani, Santiago (et al.)

Buy this book

eBook $119.00
price for USA in USD
  • ISBN 978-3-319-77479-4
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $159.99
price for USA in USD
  • ISBN 978-3-319-77478-7
  • Free shipping for individuals worldwide
  • Immediate ebook access, if available*, with your print order
  • Usually ready to be dispatched within 3 to 5 business days.
Softcover $159.99
price for USA in USD
  • ISBN 978-3-030-08465-3
  • Free shipping for individuals worldwide
  • Immediate ebook access, if available*, with your print order
  • Usually ready to be dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Advanced Techniques for Power, Energy, and Thermal Management for Clustered Manycores
Authors
Copyright
2018
Publisher
Springer International Publishing
Copyright Holder
Springer International Publishing AG, part of Springer Nature
eBook ISBN
978-3-319-77479-4
DOI
10.1007/978-3-319-77479-4
Hardcover ISBN
978-3-319-77478-7
Softcover ISBN
978-3-030-08465-3
Edition Number
1
Number of Pages
L, 250
Number of Illustrations
115 b/w illustrations, 1 illustrations in colour
Topics

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