Applied Reconfigurable Computing

1. Front Matter

   Pages I-XX

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2. Adaptive Architectures

   1. Front Matter

      Pages 1-1

      PDF

   2. Improving the Performance of Adaptive Cache in Reconfigurable VLIW Processor

      • Sensen Hu, Anthony Brandon, Qi Guo, Yizhuo Wang

      Pages 3-15

   3. LP-P\(^2\)IP: A Low-Power Version of P\(^2\)IP Architecture Using Partial Reconfiguration

      • Álvaro Avelino, Valentin Obac, Naim Harb, Carlos Valderrama, Glauberto Albuquerque, Paulo Possa

      Pages 16-27

   4. NIM: An HMC-Based Machine for Neuron Computation

      • Geraldo F. Oliveira, Paulo C. Santos, Marco A. Z. Alves, Luigi Carro

      Pages 28-35

   5. VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications

      • Joost Hoozemans, Rolf Heij, Jeroen van Straten, Zaid Al-Ars

      Pages 36-43

3. Embedded Computing and Security

   1. Front Matter

      Pages 45-45

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   2. Hardware Sandboxing: A Novel Defense Paradigm Against Hardware Trojans in Systems on Chip

      • Christophe Bobda, Joshua Mead, Taylor J. L. Whitaker, Charles Kamhoua, Kevin Kwiat

      Pages 47-59

   3. Rapid Development of Gzip with MaxJ

      • Nils Voss, Tobias Becker, Oskar Mencer, Georgi Gaydadjiev

      Pages 60-71

   4. On the Use of (Non-)Cryptographic Hashes on FPGAs

      • Andreas Fiessler, Daniel Loebenberger, Sven Hager, Björn Scheuermann

      Pages 72-80

   5. An FPGA-Based Implementation of a Pipelined FFT Processor for High-Speed Signal Processing Applications

      • Ngoc-Hung Nguyen, Sheraz Ali Khan, Cheol-Hong Kim, Jong-Myon Kim

      Pages 81-89

4. Simulation and Synthesis

   1. Front Matter

      Pages 91-91

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   2. Soft Timing Closure for Soft Programmable Logic Cores: The ARGen Approach

      • Théotime Bollengier, Loïc Lagadec, Mohamad Najem, Jean-Christophe Le Lann, Pierre Guilloux

      Pages 93-105

   3. FPGA Debugging with MATLAB Using a Rule-Based Inference System

      • Habib Ul Hasan Khan, Diana Göhringer

      Pages 106-117

   4. Hardness Analysis and Instrumentation of Verilog Gate Level Code for FPGA-based Designs

      • Abdul Rafay Khatri, Ali Hayek, Josef Börcsök

      Pages 118-128

   5. A Framework for High Level Simulation and Optimization of Coarse-Grained Reconfigurable Architectures

      • Muhammad Adeel Pasha, Umer Farooq, Muhammad Ali, Bilal Siddiqui

      Pages 129-137

5. Design Space Exploration

   1. Front Matter

      Pages 139-139

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   2. Parameter Sensitivity in Virtual FPGA Architectures

      • Peter Figuli, Weiqiao Ding, Shalina Figuli, Kostas Siozios, Dimitrios Soudris, Jürgen Becker

      Pages 141-153

   3. Custom Framework for Run-Time Trading Strategies

      • Andreea-Ingrid Funie, Liucheng Guo, Xinyu Niu, Wayne Luk, Mark Salmon

      Pages 154-167

   4. Exploring HLS Optimizations for Efficient Stereo Matching Hardware Implementation

      • Karim M. A. Ali, Rabie Ben Atitallah, Nizar Fakhfakh, Jean-Luc Dekeyser

      Pages 168-176

This book constitutes the refereed proceedings of the 13th International Symposium on Applied Reconfigurable Computing, ARC 2017, held in Delft, The Netherlands, in April 2017.

The 17 full papers and 11 short papers presented in this volume were carefully reviewed and selected from 49 submissions. They are organized in topical sections on adaptive architectures, embedded computing and security, simulation and synthesis, design space exploration, fault tolerance, FGPA-based designs, neural neworks, and languages and estimation techniques.

• field programmable gate array
• FPGA
• power consumption
• multicore architectures
• reconfigurable computing
• neural networks
• fault tolerance
• embedded systems
• image processing
• theory and algorithms for application domains
• genomics
• high-level synthesis
• medical imaging
• natural language processing
• memory access
• fault injection
• system architecture
• signal processing
• hardware verification
• electronic design automation

• Delft University of Technology, Delft, The Netherlands

  Stephan Wong, Koen Bertels

• Federal University of Rio Grande do Sul, Porto Alegre, Brazil

  Antonio Carlos Beck, Luigi Carro

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