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Broadband Direct RF Digitization Receivers

  • Book
  • © 2014

Overview

Authors:
  1. Olivier Jamin

    1. NXP Semiconductors, Caen cedex, France

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  • Provides system-level analysis of direct RF sampling & digitization receivers, from the antenna to the digital channel selection
  • Includes analysis of broadband non-linearity, applicable for low-pass and band-pass sampling strategies
  • Describes system-level design of an application-optimized signal conditioner, including a single-inductance multi-slope programmable RF amplitude equalizer, together with its control algorithm and a mixed-signal AGC loop combining RMS and peak detection

Part of the book series: Analog Circuits and Signal Processing (ACSP, volume 121)

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Table of contents (4 chapters)

  1. Front Matter

    Pages i-xvi
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  2. RF Receiver Architecture State of the Art

    • Olivier Jamin
    Pages 1-38

  3. System-Level Design Framework for Direct RF Digitization Receivers

    • Olivier Jamin
    Pages 39-97

  4. Application to the System Design of a Multichannel Cable Receiver

    • Olivier Jamin
    Pages 99-123

  5. Realization and Measurements

    • Olivier Jamin
    Pages 125-149

  6. Back Matter

    Pages 151-162
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Keywords

About this book

This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains.  A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis.  Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC.
A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption.

Authors and Affiliations

  • NXP Semiconductors, Caen cedex, France

    Olivier Jamin

Bibliographic Information

  • Book Title: Broadband Direct RF Digitization Receivers

  • Authors: Olivier Jamin

  • Series Title: Analog Circuits and Signal Processing

  • DOI: https://doi.org/10.1007/978-3-319-01150-9

  • Publisher: Springer Cham

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer International Publishing Switzerland 2014

  • Hardcover ISBN: 978-3-319-01149-3Published: 19 September 2013

  • Softcover ISBN: 978-3-319-34533-8Published: 27 August 2016

  • eBook ISBN: 978-3-319-01150-9Published: 06 September 2013

  • Series ISSN: 1872-082X

  • Series E-ISSN: 2197-1854

  • Edition Number: 1

  • Number of Pages: XVI, 162

  • Number of Illustrations: 98 b/w illustrations, 68 illustrations in colour

  • Topics: Circuits and Systems, Signal, Image and Speech Processing, Processor Architectures

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