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Springer Series in Advanced Microelectronics

System-level Test and Validation of Hardware/Software Systems

Editors: Sonza Reorda, Matteo, Peng, Zebo, Violante, Massimo (Eds.)

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About this book

New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers.

As well as giving rise to new design practices, SOC is also reshaping approaches to test and validation activities. These are beginning to migrate from the traditional register-transfer or gate levels of abstraction to the system level. Until now, test and validation have not been supported by system-level design tools so designers have lacked the necessary infrastructure to exploit all the benefits stemming from the adoption of the system level of abstraction such as higher functional performance and greater operating speed. Research efforts are already addressing this issue.

System-level Test and Validation of Hardware/Software Systems provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including:

• modeling of bugs and defects;

• stimulus generation for validation and test purposes (including timing errors;

• design for testability.

For researchers working on system-level validation and testing, for tool vendors involved in developing hardware-software co-design tools and for graduate students working in embedded systems and SOC design and implementation, System-level Test and Validation of Hardware/Software Systems will be an invaluable source of reference.

About the authors

Matteo Sonza Reorda is the leader of the computer-aided design group of the Dipartimento di Automatica e Informatica, Politecnico di Torino. Zebo Peng is Professor of the chair in Computer Systems and Director of the Embedded Systems Laboratory at Linköping University.

Table of contents (9 chapters)

Table of contents (9 chapters)
  • Introduction

    Pages 1-3

    Peng, Z. (et al.)

  • Modeling Permanent Faults

    Pages 5-25

    Teixeira, J. P.

  • Test Generation: A Symbolic Approach

    Pages 27-46

    Fummi, F. (et al.)

  • Test Generation: A Heuristic Approach

    Pages 47-65

    Goloubeva, O. (et al.)

  • Test Generation: A Hierarchical Approach

    Pages 67-81

    Jervan, G. (et al.)

Buy this book

eBook $99.00
price for USA in USD
  • ISBN 978-1-84628-145-7
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $149.99
price for USA in USD
Softcover $129.99
price for USA in USD
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Bibliographic Information

Bibliographic Information
Book Title
System-level Test and Validation of Hardware/Software Systems
Editors
  • Matteo Sonza Reorda
  • Zebo Peng
  • Massimo Violante
Series Title
Springer Series in Advanced Microelectronics
Series Volume
17
Copyright
2005
Publisher
Springer-Verlag London
Copyright Holder
Springer-Verlag London
eBook ISBN
978-1-84628-145-7
DOI
10.1007/1-84628-145-8
Hardcover ISBN
978-1-85233-899-2
Softcover ISBN
978-1-84996-953-6
Series ISSN
1437-0387
Edition Number
1
Number of Pages
XII, 179
Topics