Overview
Presents an unprecedented text, uniquely dedicated to Instruction Level Parallelism (ILP)
Provides a detailed examination of ILP architectures
Offers practical descriptions of key scheduling algorithms for extracting ILP at compile time
Illustrates how algorithms can be applied to streaming computations and compilation for Graphics Processing Units (GPUs)
Equips readers with a resourceful and comprehensive bibliography that spans over five decades
Includes supplementary material: sn.pub/extras
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Table of contents (8 chapters)
Keywords
About this book
Reviews
Authors and Affiliations
About the authors
Utpal Banerjee has a PhD in mathematics from Carnegie-Mellon University and a PhD in computer science from the University of Illinois at Urbana-Champaign. He has taught at the University of Cincinnati, Arizona State University and the University of Illinois. Dr. Banerjee has served as a research staff member at Honeywell, Fairchild, Control Data and Intel corporations. His current affiliation is with the Department of Computer Science, University of California at Irvine. He has published a number of papers and books on restructuring compilers, including encyclopedia articles and a series of books on loop transformations. He is a fellow of the IEEE and a fellow of the ACM.
Arun Kejariwal is a Statistical Learning Principal at Machine Zone. He co-founded MZ Research and currently manages a team of research scientists. He is leading the research and development of novel algorithms for fraud detection, anomaly detection in security and operational data. Prior to joining Machine Zone, he was a lead in the Data Fidelity Team at Twitter and open sourced standalone R packages for anomaly detection and breakout detection. He received Ph.D. in Computer Science from UC Irvine and is a Senior Member of IEEE and ACM.
Alexandru Nicolau’s research is in the areas of Parallel Processing/ILP, and Embedded Systems/Design Automation. His interests focus on Computer Performance/power tradeoffs, parallelizing compilers, GPUs. His current work involves collaborations both within and outside UCI, most recently with researchers at Stanford, University of Michigan, UCLA, UCSD as part of a flagship NSF Expedition project, and a separate grant with UIUC. He authored over 300 peer-reviewed papers and several books. He is the Editor-in-Chief of the International Journal of Parallel Processing, and an IEEE Fellow.
Bibliographic Information
Book Title: Instruction Level Parallelism
Authors: Alex Aiken, Utpal Banerjee, Arun Kejariwal, Alexandru Nicolau
DOI: https://doi.org/10.1007/978-1-4899-7797-7
Publisher: Springer New York, NY
eBook Packages: Computer Science, Computer Science (R0)
Copyright Information: Springer-Verlag US 2016
License: CC BY
Hardcover ISBN: 978-1-4899-7795-3Published: 30 November 2016
Softcover ISBN: 978-1-4939-7959-2Published: 29 June 2018
eBook ISBN: 978-1-4899-7797-7Published: 26 November 2016
Edition Number: 1
Number of Pages: XXI, 255
Number of Illustrations: 48 b/w illustrations, 30 illustrations in colour
Topics: Processor Architectures, Communications Engineering, Networks, Programming Languages, Compilers, Interpreters, Performance and Reliability