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Symbolic Model Checking

Authors: McMillan, Kenneth L.

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About this book

Formal verification means having a mathematical model of a system, a language for specifying desired properties of the system in a concise, comprehensible and unambiguous way, and a method of proof to verify that the specified properties are satisfied. When the method of proof is carried out substantially by machine, we speak of automatic verification. Symbolic Model Checking deals with methods of automatic verification as applied to computer hardware.
The practical motivation for study in this area is the high and increasing cost of correcting design errors in VLSI technologies. There is a growing demand for design methodologies that can yield correct designs on the first fabrication run. Moreover, design errors that are discovered before fabrication can also be quite costly, in terms of engineering effort required to correct the error, and the resulting impact on development schedules. Aside from pure cost considerations, there is also a need on the theoretical side to provide a sound mathematical basis for the design of computer systems, especially in areas that have received little theoretical attention.

Table of contents (10 chapters)

Table of contents (10 chapters)

Buy this book

eBook $59.99
price for USA in USD (gross)
  • ISBN 978-1-4615-3190-6
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Softcover $79.99
price for USA in USD
  • ISBN 978-1-4613-6399-6
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Symbolic Model Checking
Authors
Copyright
1993
Publisher
Springer US
Copyright Holder
Kluwer Academic Publishers
eBook ISBN
978-1-4615-3190-6
DOI
10.1007/978-1-4615-3190-6
Softcover ISBN
978-1-4613-6399-6
Edition Number
1
Number of Pages
XVII, 194
Topics