System-Level Design Techniques for Energy-Efficient Embedded Systems

1. Front Matter

   Pages i-xvii

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2. Introduction

   Pages 1-18

3. Background

   Pages 19-33

4. Power Variation-Driven Dynamic Voltage Scaling

   Pages 35-59

5. Optimisation of Mapping and Scheduling for Dynamic Voltage Scaling

   Pages 61-98

6. Energy-Efficient Multi-mode Embedded Systems

   Pages 99-131

7. Dynamic Voltage Scaling for Control Flow-Intensive Applications

   • Dong Wu, Bashir M. Al-Hashimi, Petru Eles

   Pages 133-149

8. LOPOCOS: A Prototype Low Power Co-Synthesis Tool

   Pages 151-172

9. Conclusion

   Pages 173-179

10. Back Matter

    Pages 181-194

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System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.

• Embedded System
• Hardware
• algorithms
• architecture
• consumption
• embedded systems
• model
• optimization

• University of Southampton, UK

  Marcus T. Schmitz, Bashir M. Al-Hashimi

• Linköping University, Sweden

  Petru Eles

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