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SOC Design Methodologies

IFIP TC10 / WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC’01) December 3–5, 2001, Montpellier, France

  • Book
  • © 2002

Overview

Editors:
  1. Michel Robert

    1. Laboratoire d’Informatique de Robotique et de Microelectronique de Montpellier (LIRMM), UMR CNRS/Universite Montpellier II, France

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  2. Bruno Rouzeyre

    1. Laboratoire d’Informatique de Robotique et de Microelectronique de Montpellier (LIRMM), UMR CNRS/Universite Montpellier II, France

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  3. Christian Piguet

    1. Laboratoire d’Informatique de Robotique et de Microelectronique de Montpellier (LIRMM), UMR CNRS/Universite Montpellier II, France

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  4. Marie-Lise Flottes

    1. Laboratoire d’Informatique de Robotique et de Microelectronique de Montpellier (LIRMM), UMR CNRS/Universite Montpellier II, France

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Part of the book series: IFIP Advances in Information and Communication Technology (IFIPAICT, volume 90)

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Table of contents (40 chapters)

  1. Front Matter

    Pages i-1
    Download chapter PDF

  2. Architecture for Signal & Image Processing

    1. Two ASIC for Low and Middle Levels of Real Time Image Processing

      • P. Lamaty, B. Mazar, D. Demigny, L. Kessal, M. Karabernou
      Pages 3-14

    2. 64 × 64 Pixels General Purpose Digital Vision Chip

      • Takashi Komuro, Masatoshi Ishikawa
      Pages 15-26

    3. A vision system on chip for industrial control

      • Eric Senn, Eric Martin
      Pages 27-38

    4. Fast Recursive Implementation of the Gaussian Filter

      • D. Demigny, L. Kessal, J. Pons
      Pages 39-49

  3. Dynamically Re-configurable Architectures

    1. A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals

      • Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys
      Pages 51-62

    2. Dynamically Reconfigurable Architectures for Digital Signal Processing Applications

      • Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy
      Pages 63-74

    3. Reconfigurable Architecture Using High Speed FPGA

      • L. Kessal, R. Bourguiba, D. Demigny, N. Boudouani, M. Karabernou
      Pages 75-86

  4. CAD Tools

    1. Design Technology for Systems-on-Chip

      • Raul Camposano, Don MacMillen
      Pages 87-96

    2. Distributed Collaborative Design over Cave2 Framework

      • Leandro Soares Indrusiak, Juergen Becker, Manfred Glesner, Ricardo Augusto da Luz Reis
      Pages 97-108

    3. High Performance Java Hardware Engine and Software Kernel for Embedded Systems

      • Morgan Hirosuke Miki, Motoki Kimura, Takao Onoye, Isao Shirakawa
      Pages 109-120

    4. An Object-Oriented Methodology for Modeling the Precise Behavior of Processor Architectures

      • João Cláudio Otero, Flávio Rech Wagner
      Pages 121-132

    5. Interconnect Capacitance Modelling in a VDSM CMOS Technology

      • David Bernard, Christian Landrault, Pascal Nouet
      Pages 133-144

  6. High Level Design Methodologies

    1. A Standardized Co-simulation Backbone

      • Braulio Adriano de Mello, Flávio Rech Wagner
      Pages 181-192

    2. Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory

      • Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed. A. Jerraya
      Pages 193-204

  7. Power Issues

    1. Modeling Power Dynamics for an Embedded DSP Processor Core

      • C. H. Gebotys, R. Muresan
      Pages 205-216

    2. Power Consumption Model for the DSP OAK Processor

      • Guitton-Ouhamou Patricia, Belleudy Cécile, Auguin Michel
      Pages 217-228
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Keywords

About this book

The 11 th IFIP International Conference on Very Large Scale Integration, in Montpellier, France, December 3-5,2001, was a great success. The main focus was about IP Cores, Circuits and System Designs & Applications as well as SOC Design Methods and CAD. This book contains the best papers (39 among 70) that have been presented during the conference. Those papers deal with all aspects of importance for the design of the current and future integrated systems. System on Chip (SOC) design is today a big challenge for designers, as a SOC may contain very different blocks, such as microcontrollers, DSPs, memories including embedded DRAM, analog, FPGA, RF front-ends for wireless communications and integrated sensors. The complete design of such chips, in very deep submicron technologies down to 0.13 mm, with several hundreds of millions of transistors, supplied at less than 1 Volt, is a very challenging task if design, verification, debug and industrial test are considered. The microelectronic revolution is fascinating; 55 years ago, in late 1947, the transistor was invented, and everybody knows that it was by William Shockley, John Bardeen and Walter H. Brattein, Bell Telephone Laboratories, which received the Nobel Prize in Physics in 1956. Probably, everybody thinks that it was recognized immediately as a major invention.

Editors and Affiliations

  • Laboratoire d’Informatique de Robotique et de Microelectronique de Montpellier (LIRMM), UMR CNRS/Universite Montpellier II, France

    Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes

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