Mathematics and Its Applications

# VLSI Planarization

## Methods, Models, Implementation

Authors: Feinberg, V.Z., Levin, A.G., Rabinovich, E.B.

Free Preview

eBook $109.00 price for USA in USD (gross) • ISBN 978-94-011-5740-7 • Digitally watermarked, DRM-free • Included format: PDF • ebooks can be used on all reading devices • Immediate eBook download after purchase Hardcover$129.99
price for USA in USD
• ISBN 978-0-7923-4510-7
• Free shipping for individuals worldwide
• Usually dispatched within 3 to 5 business days.
Softcover $139.99 price for USA in USD • ISBN 978-94-010-6421-7 • Free shipping for individuals worldwide • Usually dispatched within 3 to 5 business days. About this book At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tunĀ­ nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computerĀ­ aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it. Reviews `Altogether, the book is very well written and a good piece of work. All the notions are clearly defined and the proofs are presented in detail. Many pictures illustrate the subjects discussed and help to make things clear and understandable.' Mathematical Reviews, 98m ## Table of contents (8 chapters) • Introduction Feinberg, V. (et al.) Pages 1-5$29.95
• Discrete Mathematics Fundamentals

Feinberg, V. (et al.)

Pages 7-25

$29.95 • Graph Planarization Feinberg, V. (et al.) Pages 27-43$29.95
• Hypergraph Planarization

Feinberg, V. (et al.)

Pages 45-86

$29.95 • Mathematical Models for the VLSI Planarization Problem Feinberg, V. (et al.) Pages 87-97$29.95

eBook $109.00 price for USA in USD (gross) • ISBN 978-94-011-5740-7 • Digitally watermarked, DRM-free • Included format: PDF • ebooks can be used on all reading devices • Immediate eBook download after purchase Hardcover$129.99
price for USA in USD
• ISBN 978-0-7923-4510-7
• Free shipping for individuals worldwide
• Usually dispatched within 3 to 5 business days.
Softcover \$139.99
price for USA in USD
• ISBN 978-94-010-6421-7
• Free shipping for individuals worldwide
• Usually dispatched within 3 to 5 business days.

## Bibliographic Information

Bibliographic Information
Book Title
VLSI Planarization
Book Subtitle
Methods, Models, Implementation
Authors
Series Title
Mathematics and Its Applications
Series Volume
399
1997
Publisher
Springer Netherlands