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Integrated Circuits and Systems

Wafer Level 3-D ICs Process Technology

Editors: Tan, Chuan Seng, Gutmann, Ronald J., Reif, L. Rafael (Eds.)

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  • Focuses on the foundry-based process technology for the fabrication of 3-D ICs
  • Discusses the technology platform for pre-packaging wafer level 3-D ICs
  • Includes chapters contributed by various experts in the field of wafer-level 3-D ICs process technology
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  • ISBN 978-0-387-76534-1
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Softcover $199.99
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About this book

Wafer Level 3-D ICs Process Technology focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses alternative technology platforms for pre-packaging wafer level 3-D ICs, with an emphasis on wafer-to-wafer stacking. Driven by the need for improved performance, a number of companies, consortia and universities are researching methods to use short, monolithically-fabricated, vertical interconnections to replace the long interconnects found in 2-D ICs. Stacking disparate technologies to provide various combinations of densely-packed functions, such as logic, memory, MEMS, displays, RF, mixed-signal, sensors, and power delivery is potentially possible with 3-D heterogeneous integration, making this technology the "Holy Grail" of system integration.

Wafer Level 3-D ICs Process Technology is an edited book based on chapters contributed by various experts in the fields of wafer-level 3-D ICs process technology and applications enabled by 3-D integration.

Table of contents (15 chapters)

Table of contents (15 chapters)

Buy this book

eBook $149.00
price for USA in USD
  • ISBN 978-0-387-76534-1
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $249.99
price for USA in USD
  • ISBN 978-0-387-76532-7
  • Free shipping for individuals worldwide
  • Immediate ebook access, if available*, with your print order
  • Usually ready to be dispatched within 3 to 5 business days.
Softcover $199.99
price for USA in USD
  • ISBN 978-1-4419-4562-4
  • Free shipping for individuals worldwide
  • Immediate ebook access, if available*, with your print order
  • Usually ready to be dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Wafer Level 3-D ICs Process Technology
Editors
  • Chuan Seng Tan
  • Ronald J. Gutmann
  • L. Rafael Reif
Series Title
Integrated Circuits and Systems
Copyright
2008
Publisher
Springer US
Copyright Holder
Springer-Verlag US
eBook ISBN
978-0-387-76534-1
DOI
10.1007/978-0-387-76534-1
Hardcover ISBN
978-0-387-76532-7
Softcover ISBN
978-1-4419-4562-4
Series ISSN
1558-9412
Edition Number
1
Number of Pages
XII, 410
Topics

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