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Integrated Circuits and Systems

Leakage in Nanometer CMOS Technologies

Editors: Narendra, Siva G., Chandrakasan, Anantha P. (Eds.)

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  • ISBN 978-0-387-28133-9
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About this book

Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumption, and in many scaled technologies leakage contributes 30-50% of the overall power consumption under nominal operating conditions. Leakage is important in a variety of different contexts. For example, in desktop applications, active leakage power (i.e., leakage power when the processor is computing) is becoming significant compared to switching power. In battery operated systems, standby leakage (i.e., leakage when the processor clock is turned off) dominates as energy is drawn over long idle periods. Increased transistor leakages not only impact the overall power consumed by a CMOS system, but also reduce the margins available for design due to the strong relationship between process variation and leakage power. It is essential for circuit and system designers to understand the components of leakage, sensitivity of leakage to different design parameters, and leakage mitigation techniques in nanometer technologies. This book provides an in-depth treatment of these issues for researchers and product designers.

Table of contents (12 chapters)

  • Taxonomy of Leakage: Sources, Impact, and Solutions

    Pages 1-19

  • Leakage Dependence on Input Vector

    Narendra, Siva (et al.)

    Pages 21-39

  • Power Gating and Dynamic Voltage Scaling

    Calhoun, Benton (et al.)

    Pages 41-75

  • Methodologies for Power Gating

    Usami, Kimiyoshi (et al.)

    Pages 77-104

  • Body Biasing

    Kuroda, Tadahiro (et al.)

    Pages 105-140

Buy this book

eBook $149.00
price for USA in USD (gross)
  • ISBN 978-0-387-28133-9
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover $249.99
price for USA in USD
  • ISBN 978-0-387-25737-2
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $199.99
price for USA in USD
  • ISBN 978-1-4419-3826-8
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
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Bibliographic Information

Bibliographic Information
Book Title
Leakage in Nanometer CMOS Technologies
Editors
  • Siva G. Narendra
  • Anantha P. Chandrakasan
Series Title
Integrated Circuits and Systems
Copyright
2006
Publisher
Springer US
Copyright Holder
Springer-Verlag US
eBook ISBN
978-0-387-28133-9
DOI
10.1007/0-387-28133-9
Hardcover ISBN
978-0-387-25737-2
Softcover ISBN
978-1-4419-3826-8
Series ISSN
1558-9412
Edition Number
1
Number of Pages
X, 308
Topics