Circuits, Systems, and Signal Processing - Call for Papers - Special Issue on Low Power Computing: Devices, Circuits & Systems for Signal Processing
Digital signal processing (DSP) is a ubiquitous technology which plays the central role in many different areas of applications. More often, complex signal processing algorithms are implemented to deliver and superior performances in a resource constrained environment particularly for Internet-of-Things (IoT) applications. Implementation of complex signal processing algorithms in resource constrained environment and providing real-time performance with low-power consumption is a challenging task as high-performance, low-area and power consumption are incompatible design constraints. Along with the growth of integration circuit technology and device scaling, system performance can be scaled by introducing processing concurrency. However, the power budget does not scale as the device integration. Therefore, enhancing system performance at reduced power consumption is a challenging task. Algorithm mapping and architectural design plays the critical role for implementation of DSP algorithm in ASIC and FPGA to meet the system level specifications. Architectural design and implementation of DSP algorithms for emerging technologies is a challenging research area. Approximate computation gained a significant attention in recent years as small computational errors do not affect much on the application due to perceptual limitations of human. Approximate computation provides an opportunity to reduce area-delay complexity and power consumption of the hardware design. Based on algorithm complexity and data-dependence, specific design strategy needs to be followed to exploit fully the potential of approximate computation.
The proliferation of the Internet of Things (IoT) opens up opportunities across various domains such as devices, circuits, and systems. Consequently, prioritizing the design of low-power post-CMOS emerging devices, as well as low-voltage and ultra-low-power circuits, along with the integration of circuits/memories in a System-on-Chip (SoC), has become critically important. This emphasis stems from the need to address power constraints and the evolving deep submicron technologies, which mandate progressively lower supply voltages, often falling below 1V. In certain cases, even lower supply voltages are essential for low-power systems, particularly those utilized in biomedical implantable or wearable electronic devices, autonomous sensor nodes powered by nonconventional energy sources, Internet of Things networks, and similar applications. For analog and digital designers, preserving circuit performance poses a significant challenge, necessitating the development of innovative circuit structures capable of functioning effectively at low supply voltages. Furthermore, the growing requirements for both low supply voltage and energy efficiency can potentially impact the robustness and reliability of integrated circuits, especially analog ones.
Topics to be covered in this special issue are:
- Algorithm and Architectural Design for Signal Processing Applications
- Approximate arithmetic circuit design
- Approximate computation for AI
- Architectural design for low-power applications
- Theory, design, and emerging applications of circuits operating at low voltage/power
- Novel developments in the design of analog circuits with a focus on low voltage
- Unconventional techniques for designing analog and digital circuits at low voltage
- Implantable and wearable devices tailored for biomedical monitoring applications
- Interfaces for sensorsSystems on Chip (SoC) through the design of low-voltage and low-power systems
- Challenges and innovations in circuits designed for Internet of Things (IoT) applications with a low-voltage perspective
- Low-power processing units such as hardware accelerators, hardware-implemented neural networks, crypto-processors
- VLSI for Applied and Future Computing (AFC): circuits and architectures for machine learning and artificial intelligence, deep learning acceleration techniques
- Digital Circuits and FPGA based Designs (DCF): Digital circuits, high speed/low-power circuits, energy efficient circuits, near and sub-threshold circuits, memories, FPGA designs, FPGA based systems.
Important dates
Manuscript submissions due November 30, 2024
First round of reviews completed & authors notified February 15, 2025
Revised manuscripts due March 30, 2025
Second round of reviews completed June 15, 2025
Final Notification June 30, 2025
Final manuscripts due July 15, 2025
Target publication date September 2025
Guest Editorial Team
Dr. Basant Kumar Mohanty
Lead Guest Editor, Director, Sambalpur University Institute of Information Technology, Burla, Odisha India, Email: director@suiit.ac.in (this opens in a new tab)
Dr. Alak Majumder, PhD, SMIEEE
Assistant Professor, Department of ECE, National Institute of Technology, Arunachal Pradesh, India - 791113, Email: alak@nitap.ac.in (this opens in a new tab)
Dr. Durgesh Nandan
Associate Professor, School of Computer Science & Artificial Intelligence, SR University, Warangal, Telangana, India-506371, Email: durgesh.nandan@sru.edu.in (this opens in a new tab)
Dr. Gyungsu Byun
Professor, School of Information and Communication Engineering, Inha University, Incheon, Korea, Email: gsbyun@inha.ac.kr (this opens in a new tab)