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Journal of Signal Processing Systems

for Signal, Image, and Video Technology (formerly the Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology)

Publishing model:
Hybrid

Journal of Signal Processing Systems - Call for Papers: AI Compilers and Embedded Multicore Optimizations in Journal of Signal Processing Systems

Scope


With the growing of AI applications, the infrastructures on embedded systems to support AI compute in the edge site are becoming increasingly important. This includes research directions on AI compiler optimizations, SIMD compute with embedded RISC-V processors, AI compiler flows for hardware and software co-designs, footprint reduction with edge AI compute, numeric methods with fixed-point computations, sparse pruning for AI models, etc. In addition, the support of the software infrastructures for APIs such as Khronos APIs, the open source support with AI compiler such as TVM, and the open source support with MLIR are growing with importance.   

In this special issue, we aim to bring together researchers in the related areas to present the latest developments and technical solutions concerning various aspects of embedded multi-core computing and infrastructures for edge-site AI applications. This special issue seeks original unpublished papers focusing on emerging embedded compilers, AI compilers, embedded memory and architecture design, DSP/GPU systems, system optimizations, performance tools, and embedded multi-core programming models.

The field of AI is growing rapidly, and this Call for Papers relates to multiple United Nations Sustainable Development Goals, (SDGs) through advances in supporting collaborative evidence-based approaches to build resilient infrastructure, promote inclusive and sustainable industrialization, and foster innovation. This special issue welcomes submissions related to SDG 9 “Industry, Innovation, and Infrastructure.”

The topics of this special issue include but not limited to:

  • Architectures for embedded multi-core signal processing systems
  • AI Compilers
  • OpenCL supports for AI applications
  • Sparse AI compilers
  • AI Compilers with HLS Flow Optimizations
  • Compilers for DSP processors
  • Compilers and optimizations with embedded multi-core supports
  • Special instructions for architectures to support post processing and pre-processing models
  • AI compilers for DSP architectures 
  • Low-power numeric supports with DSP systems for AI applications
  • Partitioning and scheduling with AI compilers for AI models
  • TVM and MLIR Optimizations
  • Auto-Tuning for AI compiler Optimizations
  • OpenVX and NNEF Optimizations
  • Compilers optimizations for Subword SIMD computations
  • Compilers for heterogeneous embedded multi-core systems
  • Programming models for embedded multi-core systems
  • Signal processing and machine learning on embedded multi-core systems
  • Multimedia signal processing algorithms on embedded multi-core systems
  • Multimedia applications on embedded multi-core systems
  • OpenCL ML compilers and applications on multi-core systems
  • OpenCL programming models with graph
  • Audio signal processing and recognition with multi-core designs
  • Numerical libraries and architecture supports for machine learning
  • Compiler optimizations with RISC-V SIMD
  • Performance analysis methodologies and tools


Submission Guidelines

Original papers from the above mentioned and related topics will be considered. Please submit regular full papers, including all figures, tables, and references, from the JSPS paper submission website http://www.editorialmanager.com/vlsi/default.asp. Please select the article type "SI: AI Compilers and Embedded Multicore Optimizations" for submission to this special issue in the paper submission system. Authors are requested to follow the paper format specified in the above journal submission website. Submitted papers must not have appeared in or be under review/consideration for another journal or conference during the review process. 


Important Dates

Paper submission deadline: April 15, 2024 
Notification of the first-round review: July 15, 2024 
Submission deadline of paper revision:  August 15, 2024
Notification of the second-round review: September 15,2024
Final manuscript due for accepted papers: October 15, 2024


Guest Editors

  • Prof. Jenq Kuen Lee, National Tsing-Hua University
  • Dr. Yung-Chia Lin, MediaTek, Boston, USA
  • Dr. Wen-Chuan Lee, Research Scientist, Apple, USA
  • Dr. Chia-Heng Tu, Associate Professor, National Cheng Kung University, Taiwan

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