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Logic Synthesis and SOC Prototyping

RTL Design using VHDL

Authors: Taraate, Vaibbhav

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  • Emphasises SOC architecture and micro-architecture design with case studies
  • Consists of the practical scenarios and issues and helpful to graduate students and professionals
  • Covers SOC Design, implementation using VHDL, Synthesis and timing analysis
  • Covers key case studies in the generic form for processor, buses, interfaces, memory controllers, DSP and Video controllers
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eBook 96,29 €
price for India (gross)
  • ISBN 978-981-15-1314-5
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover 119,99 €
price for India (gross)
  • ISBN 978-981-15-1313-8
  • Free shipping for individuals worldwide
  • Institutional customers should get in touch with their account manager
  • Covid-19 shipping restrictions
  • Usually ready to be dispatched within 3 to 5 business days, if in stock
Softcover 84,99 €
price for India (gross)
  • ISBN 978-981-15-1316-9
  • Free shipping for individuals worldwide
  • Institutional customers should get in touch with their account manager
  • Covid-19 shipping restrictions
  • Usually ready to be dispatched within 3 to 5 business days, if in stock
About this book

This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book gives practical information on the issues in SOC and ASIC prototyping using modern high-density FPGAs. The book covers SOC performance improvement techniques, testing, and system-level verification. The book also describes the modern Xilinx FPGA architecture and their use in SOC prototyping. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design. The contents of this book will be of use to students, professionals, and hobbyists alike.


About the authors

Vaibbhav Taraate is Entrepreneur and Mentor at “1 Rupee S T”. He holds a B.E. (Electronics) degree from Shivaji University, Kolhapur, in 1995 and secured a gold medal for standing first in all engineering branches. He has completed his M.Tech. (Aerospace Control and Guidance) in 1999 from IIT Bombay. He has over 15 years ofexperience in semi-custom ASIC and FPGA design, primarily using HDL languages such as Verilog and VHDL. He has worked with few multinational corporations as consultant, senior design engineer, and technical manager. His areas of expertise include RTL design using VHDL, RTL design using Verilog, complex FPGA-based design, low power design, synthesis/optimization, static timing analysis, system design using microprocessors, high-speed VLSI designs, and architecture design of complex SOCs.

Table of contents (13 chapters)

Table of contents (13 chapters)

Buy this book

eBook 96,29 €
price for India (gross)
  • ISBN 978-981-15-1314-5
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover 119,99 €
price for India (gross)
  • ISBN 978-981-15-1313-8
  • Free shipping for individuals worldwide
  • Institutional customers should get in touch with their account manager
  • Covid-19 shipping restrictions
  • Usually ready to be dispatched within 3 to 5 business days, if in stock
Softcover 84,99 €
price for India (gross)
  • ISBN 978-981-15-1316-9
  • Free shipping for individuals worldwide
  • Institutional customers should get in touch with their account manager
  • Covid-19 shipping restrictions
  • Usually ready to be dispatched within 3 to 5 business days, if in stock
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Bibliographic Information

Bibliographic Information
Book Title
Logic Synthesis and SOC Prototyping
Book Subtitle
RTL Design using VHDL
Authors
Copyright
2020
Publisher
Springer Singapore
Copyright Holder
Springer Nature Singapore Pte Ltd.
eBook ISBN
978-981-15-1314-5
DOI
10.1007/978-981-15-1314-5
Hardcover ISBN
978-981-15-1313-8
Softcover ISBN
978-981-15-1316-9
Edition Number
1
Number of Pages
XIX, 251
Topics