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Theoretical Computer Science and General Issues

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation

20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers

Editors: van Leuken, Rene, Sicard, Gilles (Eds.)

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eBook 51,16 €
price for Spain (gross)
  • ISBN 978-3-642-17752-1
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Softcover 62,39 €
price for Spain (gross)
  • ISBN 978-3-642-17751-4
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  • This title is currently reprinting. You can pre-order your copy now.
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About this book

This book constitutes the refereed proceedings of the 20th International Conference on Integrated Circuit and System Design, PATMOS 2010, held in Grenoble, France, in September 2010. The 24 revised full papers presented and the 9 extended abstracts were carefully reviewed and are organized in topical sections on design flows; circuit techniques; low power circuits; self-timed circuits; process variation; high-level modeling of poweraware heterogeneous designs in SystemC-AMS; and minalogic.

Table of contents (32 chapters)

Table of contents (32 chapters)
  • A Power-Aware Online Scheduling Algorithm for Streaming Applications in Embedded MPSoC

    Pages 1-10

    Sassolas, Tanguy (et al.)

  • An Automated Framework for Power-Critical Code Region Detection and Power Peak Optimization of Embedded Software

    Pages 11-20

    Bachmann, Christian (et al.)

  • System Level Power Estimation of System-on-Chip Interconnects in Consideration of Transition Activity and Crosstalk

    Pages 21-30

    Gag, Martin (et al.)

  • Residue Arithmetic for Designing Low-Power Multiply-Add Units

    Pages 31-40

    Kouretas, Ioannis (et al.)

  • An On-Chip Flip-Flop Characterization Circuit

    Pages 41-50

    Jain, Abhishek (et al.)

Buy this book

eBook 51,16 €
price for Spain (gross)
  • ISBN 978-3-642-17752-1
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Softcover 62,39 €
price for Spain (gross)
  • ISBN 978-3-642-17751-4
  • Free shipping for individuals worldwide
  • This title is currently reprinting. You can pre-order your copy now.
  • The final prices may differ from the prices shown due to specifics of VAT rules
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Bibliographic Information

Bibliographic Information
Book Title
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation
Book Subtitle
20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers
Editors
  • Rene van Leuken
  • Gilles Sicard
Series Title
Theoretical Computer Science and General Issues
Series Volume
6448
Copyright
2011
Publisher
Springer-Verlag Berlin Heidelberg
Copyright Holder
Springer Berlin Heidelberg
eBook ISBN
978-3-642-17752-1
DOI
10.1007/978-3-642-17752-1
Softcover ISBN
978-3-642-17751-4
Edition Number
1
Number of Pages
XII, 260
Number of Illustrations
77 b/w illustrations, 53 illustrations in colour
Topics