UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
Authors: Daněk, M., Kafka, L., Kohout, L., Sýkora, J., Bartosiński, R.
Free Preview- Describes and documents a working SPARC v8, with fine-grain multithreading and fast context switch Provides VHDL sources for the described processor
- Describes a latency-tolerant framework for coupling hardware accelerators to microthreaded processor pipelines Includes programming by example in the micro-threaded assembly language
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- About this book
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This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs.
- Table of contents (9 chapters)
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Introduction
Pages 3-7
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The LEON3 Processor
Pages 9-14
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Microthreaded Extensions
Pages 15-43
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The Basic UTLEON3 Architecture
Pages 45-66
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UTLEON3 Programming by Example
Pages 67-77
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Table of contents (9 chapters)
- Download Preface 1 PDF (39.3 KB)
- Download Sample pages 1 PDF (211.1 KB)
- Download Table of contents PDF (88.9 KB)
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Bibliographic Information
- Bibliographic Information
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- Book Title
- UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
- Authors
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- Martin Daněk
- Leoš Kafka
- Lukáš Kohout
- Jaroslav Sýkora
- Roman Bartosiński
- Copyright
- 2013
- Publisher
- Springer-Verlag New York
- Copyright Holder
- Springer Science+Business Media, LLC
- eBook ISBN
- 978-1-4614-2410-9
- DOI
- 10.1007/978-1-4614-2410-9
- Hardcover ISBN
- 978-1-4614-2409-3
- Softcover ISBN
- 978-1-4899-9570-4
- Edition Number
- 1
- Number of Pages
- XVIII, 222
- Topics
