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Interconnect-Centric Design for Advanced SOC and NOC

Editors: Nurmi, J., Tenhunen, H., Isoaho, J., Jantsch, A. (Eds.)

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About this book

In Interconnect-centric Design for Advanced SoC and NoC, we have tried to create a comprehensive understanding about on-chip interconnect characteristics, design methodologies, layered views on different abstraction levels and finally about applying the interconnect-centric design in system-on-chip design.
Traditionally, on-chip communication design has been done using rather ad-hoc and informal approaches that fail to meet some of the challenges posed by next-generation SOC designs, such as performance and throughput, power and energy, reliability, predictability, synchronization, and management of concurrency. To address these challenges, it is critical to take a global view of the communication problem, and decompose it along lines that make it more tractable. We believe that a layered approach similar to that defined by the communication networks community should also be used for on-chip communication design.
The design issues are handled on physical and circuit layer, logic and architecture layer, and from system design methodology and tools point of view. Formal communication modeling and refinement is used to bridge the communication layers, and network-centric modeling of multiprocessor on-chip networks and socket-based design will serve the development of platforms for SoC and NoC integration. Interconnect-centric Design for Advanced SoC and NoC is concluded by two application examples: interconnect and memory organization in SoCs for advanced set-top boxes and TV, and a case study in NoC platform design for more generic applications.

Reviews

From the reviews:

"…a collection of edited chapters written by various experts on NoC and on-chip communications design; the editors contributed to several of the chapters and, for the others, drew on several colleagues—including those participating in Complain, the Finnish-Swedish Excite research project. The editors have carefully chosen the topics in this volume to reflect the multiple levels and types of design knowledge required to gain an appreciation of the field… this book is quite useful for educating any SoC design team in many of the areas critical to adapting their designs to future generations of interconnect. It can also be a useful reference text for advanced undergraduate- and graduate-level courses in SoC and VLSI design. Designers and design educators should take a close look at this book."
(IEEE Design & Test of Computers Magazine)

"The book is a collection of edited chapters written by various experts on NoC and on chip communications design … . The editors have carefully chosen the topics in this volume … . Clearly, the book covers an impressive breadth of topics … . Each chapter surveys the relevant literature in its particular topic area and provides an extensive reference list … . a useful reference text for advanced undergraduate- and graduate-level courses in SoC and VLSI design. Design and design educators should take a close look at this book." (Grant Martin, IEEE Design & Test of Computers, March-April, 2005)

 

 


Table of contents (16 chapters)

Table of contents (16 chapters)
  • System-on-Chip-Challenges in the Deep-Sub-Micron Era

    Pages 3-24

    Rabaey, Jan M.

  • Wires as Interconnects

    Pages 25-54

    Zheng, Li-Rong (et al.)

  • Global Interconnect Analysis

    Pages 55-84

    Nurmi, Tero (et al.)

  • Design Methodologies for on-Chip Inductive Interconnect

    Pages 85-124

    El-Moursy, Magdy A. (et al.)

  • Clock Distribution for High Performance Designs

    Pages 125-152

    Rusu, Stefan

Buy this book

eBook 154,69 €
price for Spain (gross)
  • ISBN 978-1-4020-7836-1
  • Digitally watermarked, DRM-free
  • Included format: PDF
  • ebooks can be used on all reading devices
  • Immediate eBook download after purchase
Hardcover 207,99 €
price for Spain (gross)
  • ISBN 978-1-4020-7835-4
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
  • The final prices may differ from the prices shown due to specifics of VAT rules
Softcover 194,38 €
price for Spain (gross)
  • ISBN 978-1-4419-5442-8
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
  • The final prices may differ from the prices shown due to specifics of VAT rules
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Bibliographic Information

Bibliographic Information
Book Title
Interconnect-Centric Design for Advanced SOC and NOC
Editors
  • Jari Nurmi
  • H. Tenhunen
  • J. Isoaho
  • Axel Jantsch
Copyright
2004
Publisher
Springer US
Copyright Holder
Springer-Verlag US
eBook ISBN
978-1-4020-7836-1
DOI
10.1007/b117241
Hardcover ISBN
978-1-4020-7835-4
Softcover ISBN
978-1-4419-5442-8
Edition Number
1
Number of Pages
VIII, 454
Topics