Interconnect Technology and Design for Gigascale Integration

1. Front Matter

   Pages i-xiii

   PDF

2. Interconnect Opportunities for Gigascale Integration (GSI)

   • J. D. Meindl, J. A. Davis, P. Zarkesh-Ha, C. Patel, K. P. Martin, P. A. Kohl

   Pages 1-34

3. Copper BEOL Interconnects for Silicon CMOS Logic Technology

   • Satya V. Nitta, Sampath Purushothaman, James G. Ryan, Daniel C. Edelstein, Panayotis Andricacos, Chao-Kun Hu et al.

   Pages 35-65

4. Interconnect Parasitic Extraction of Resistance, Capacitance, and Inductance

   • Xiaoning Qi, Robert W. Dutton

   Pages 67-109

5. Distributed RC and RLC Transient Models

   • J. Davis, A. Naeemi, J. Meindl

   Pages 111-157

6. Power, Clock, and Global Signal Distribution

   • P. Zarkesh-Ha

   Pages 159-217

7. Stochastic Multilevel Interconnect Modeling and Optimization

   • J. Davis, R. Venkatesan, J. Meindl

   Pages 219-262

8. Interconnect-Centric Computer Architectures

   • S. M. Chai, D. Scott Wills

   Pages 263-292

9. Chip-to-Module Interconnections

   • P. Kohl

   Pages 293-322

10. 3-D ICS DSM Interconnect Performance Modeling and Analysis

    • S. J. Souri, T. Chiang, P. Kapur, K. Banerjee, K. C. Saraswat

    Pages 323-381

11. Silicon Microphotonics

    • L. C. Kimerling

    Pages 383-401

12. Back Matter

    Pages 403-411

    PDF

Interconnect Technology and Design for Gigascale Integration is the cumulative effort from academic researchers at Georgia Tech, MIT, and Stanford, as well as from industry researchers at IBM T.J. Watson Research Center, LSI Logic, and SUN microsystems. The material found in this book is unique in that it spans IC interconnect topics ranging from IBM's revolutionary copper process to an in depth exploration into interconnect-aware computer architectures. This broad swath of topics presented by leaders in the research field is intended to provide a comprehensive perspective on interconnect technology and design issues so that the reader will understand the implications of the semiconductor industry's next substantial milestone - gigascale integration.

• LSI
• Transistor
• architecture
• complexity
• computer-aided design (CAD)
• integrated circuit
• modeling

• Georgia Institute of Technology, USA

  Jeff Davis

• Microelectronics Research Center, Georgia Institute of Technology, USA

  James D. Meindl

Policies and ethics