Authors:
- This book provides a reader with a deep understanding of logic locking concepts, analytical skills for the quantitative security evaluation of security techniques and prepares then for either application of the studied security concepts or further research in this area.
- The book systematizes the knowledge of logic locking and covers from the earliest techniques to state-of-the-art research.
- The authors have been associated with the logic locking research since its inception.
Part of the book series: Analog Circuits and Signal Processing (ACSP)
Buy it now
Buying options
Tax calculation will be finalised at checkout
Other ways to access
This is a preview of subscription content, log in via an institution to check for access.
Table of contents (11 chapters)
-
Front Matter
-
Back Matter
About this book
Different from the edited monograms, the chapters in this book are not re-compilations of research papers. The book follows a pedagogical approach. Each chapter has been planned to emphasize the fundamental principles behind the logic locking algorithms and relate concepts to each other using a systematization of knowledge approach. Furthermore, the authors of this book have contributed to this field significantly through numerous fundamental papers.
Authors and Affiliations
-
New York University Abu Dhabi, Saadiyaat Island, Abu Dhabi, United Arab Emirates
Muhammad Yasin, Ozgur Sinanoglu
-
Department of Electrical & Computer Engineering, WEB 333H, Texas A&M University, College Station, USA
Jeyavijayan (JV) Rajendran
About the authors
Muhammad is a PhD candidate at Tandon School of Engineering and a Global PhD Student Fellow in NYUAD. He obtained his MS in Microsystems Engineering from Masdar Institute of Science and Technology, UAE, in 2013 and BS in Elec- trical Engineering from University of Engineering and Technology (UET) Lahore, Pakistan, in 2007. He has previously served as Lecturer at COMSATS Institute of IT, Lahore. His research interests include Hardware Security and Design for Trust.
Jeyavijayan Rajendran is an Assistant Professor in the Department of Elec- trical and Computer Engineering at Texas A&M University. He obtained his Ph.D. degree in the Electrical and Computer Engineering Department at New York University in August 2015. His research interests include hardware secu- rity and emerging technologies. His research has won the NSF CAREER Award in 2017, the ACM SIGDA Outstanding Ph.D. Dissertation Award in 2017, and the Alexander Hessel Award for the Best Ph.D. Dissertation in the Electrical and Computer Engineering Department at NYU in 2016. He has won three Student Paper Awards (ACM CCS 2013, IEEE DFTS 2013, and IEEE VLSI Design 2012); four ACM Student Research Competition Awards (DAC 2012, ICCAD 2013, DAC 2014, and the Grand Finals 2013); Service Recognition Award from Intel; Third place at Kaspersky American Cup, 2011; and Myron M. Rosenthal Award for Best Academic Performance in M.S. from NYU, 2011. He organizes the annual Embed- ded Security Challenge, a red-team/blue-team hardware security competition and has co-founded Hack@DAC, a student security competition co-located with DAC. He is a member of IEEE and ACM. Ozgur Sinanoglu is an Associate Professor of electrical and computer engineer- ing at New York University Abu Dhabi. He earned his B.S. degrees, one in Elec- trical and Electronics Engineering and one in Computer Engineering, both from Bogazici University, Turkey in 1999. He obtained his MS and PhD in Computer Science and Engineering from University of California San Diego in 2001 and 2004, respectively. He has industry experience at TI, IBM and Qualcomm, and has been with NYU Abu Dhabi since 2010. During his PhD, he won the IBM PhD fellow- ship award twice. He is also the recipient of the best paper awards at IEEE VLSI Test Symposium 2011 and ACM Conference on Computer and Communication Security 2013. Prof. Sinanoglu’s research interests include design-for-test, design-for-security and design-for-trust for VLSI circuits, where he has around 170 conference and journal papers, and 20 issued and pending US Patents. Sinanoglu has given more than a dozen tutorials on hardware security and trust in leading CAD and test conferences, such as DAC, DATE, ITC, VTS, ETS, ICCD, ISQED, etc. He is serving as track/topic chair or technical program committee member in about 15 conferences, and as (guest) associate editor for IEEE TIFS, IEEE TCAD, ACM JETC, IEEE TETC, ElsevierMEJ, JETTA, and IET CDT journals.Prof. Sinanoglu is the director of the Design-for-Excellence Lab at NYU Abu Dhabi. His recent research in hardware security and trust, including logic locking, is being funded by US National Science Foundation, US Department of Defense (Army Research Office and DARPA), Semiconductor Research Corporation, and Mubadala Technology.Bibliographic Information
Book Title: Trustworthy Hardware Design: Combinational Logic Locking Techniques
Authors: Muhammad Yasin, Jeyavijayan (JV) Rajendran, Ozgur Sinanoglu
Series Title: Analog Circuits and Signal Processing
DOI: https://doi.org/10.1007/978-3-030-15334-2
Publisher: Springer Cham
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Nature Switzerland AG 2020
Hardcover ISBN: 978-3-030-15333-5Published: 20 September 2019
Softcover ISBN: 978-3-030-15336-6Published: 20 September 2020
eBook ISBN: 978-3-030-15334-2Published: 04 September 2019
Series ISSN: 1872-082X
Series E-ISSN: 2197-1854
Edition Number: 1
Number of Pages: XXI, 142
Number of Illustrations: 7 b/w illustrations, 58 illustrations in colour
Topics: Circuits and Systems, Logic Design, Arithmetic and Logic Structures