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- Über dieses Buch
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This book presents a formal model for evaluating the cost effectiveness of computer architectures. The model can cope with a wide range of architectures, from CPU design to parallel supercomputers. To illustrate the formal procedure of trade-off analyses, several non-pipelined design alternatives for the well-known RISC architecture called DLX are analyzed quantitatively. It is formally proved that the interrupt mechanism proposed for the DLX architecture handles nested interrupts correctly.
In an appendix all programs to compute the cost and cycle time of the designs described are listed in C code. Running these simple C programs on a PC is sufficient to verify the results presented. The book addresses design professionals and students in computer architecture.
- Inhaltsverzeichnis (10 Kapitel)
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Introduction
Seiten 1-3
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The formal architecture model
Seiten 5-20
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Functional modules
Seiten 21-42
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Hardwired control
Seiten 43-58
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Design of a minimal CPU
Seiten 59-75
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Inhaltsverzeichnis (10 Kapitel)
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Bibliografische Information
- Bibliographic Information
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- Buchtitel
- The Complexity of Simple Computer Architectures
- Herausgeber
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- Silvia M. Müller
- Wolfgang J. Paul
- Titel der Buchreihe
- Lecture Notes in Computer Science
- Buchreihen Band
- 995
- Copyright
- 1995
- Verlag
- Springer-Verlag Berlin Heidelberg
- Copyright Inhaber
- Springer-Verlag Berlin Heidelberg
- eBook ISBN
- 978-3-540-47774-7
- DOI
- 10.1007/3-540-60580-0
- Softcover ISBN
- 978-3-540-60580-5
- Buchreihen ISSN
- 0302-9743
- Auflage
- 1
- Seitenzahl
- XII, 273
- Themen
