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The Regularized Fast Hartley Transform

Optimal Formulation of Real-Data Fast Fourier Transform for Silicon-Based Implementation in Resource-Constrained Environments

  • Book
  • © 2010

Overview

  • Describes direct solution to real-data DFT targeted at those real-world applications, such as mobile communications, where resources are limited
  • Achieving computational density of most advanced commercially-available solutions for greatly reduced silicon resources
  • Yielding simple design variations that enable one to optimize use of available silicon resources with resulting designs being: scalable and device-independent
  • Area-efficient with memory requirement reducible to theoretical minimum
  • Includes supplementary material: sn.pub/extras

Part of the book series: Signals and Communication Technology (SCT)

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Table of contents (10 chapters)

Keywords

About this book

Most real-world spectrum analysis problems involve the computation of the real-data discrete Fourier transform (DFT), a unitary transform that maps elements N of the linear space of real-valued N-tuples, R , to elements of its complex-valued N counterpart, C , and when carried out in hardware it is conventionally achieved via a real-from-complex strategy using a complex-data version of the fast Fourier transform (FFT), the generic name given to the class of fast algorithms used for the ef?cient computation of the DFT. Such algorithms are typically derived by explo- ing the property of symmetry, whether it exists just in the transform kernel or, in certain circumstances, in the input data and/or output data as well. In order to make effective use of a complex-data FFT, however, via the chosen real-from-complex N strategy, the input data to the DFT must ?rst be converted from elements of R to N elements of C . The reason for choosing the computational domain of real-data problems such N N as this to be C , rather than R , is due in part to the fact that computing equ- ment manufacturers have invested so heavily in producing digital signal processing (DSP) devices built around the design of the complex-data fast multiplier and accumulator (MAC), an arithmetic unit ideally suited to the implementation of the complex-data radix-2 butter?y, the computational unit used by the familiar class of recursive radix-2 FFT algorithms.

Reviews

From the reviews:

“The aim of the author is to present a design for a generic double-sized butterfly for use by the fast Hartley transform (FHT) of radix-4 length, which lends itself to parallelization and to mapping onto a regular computational structure for implementation with parallel computing technology. … The textbook is mainly written for students and researchers in engineering and computer science, who are interested in the design and implementation of parallel algorithms for real-data DFT and DHT.” (Manfred Tasche, Zentralblatt MATH, Vol. 1191, 2010)

Authors and Affiliations

  • L-3 Communications TRL Technology, Tewkesbury, Gloucestershire, United Kingdom

    Keith Jones

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