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Applied Reconfigurable Computing

15th International Symposium, ARC 2019, Darmstadt, Germany, April 9–11, 2019, Proceedings

  • Conference proceedings
  • © 2019

Overview

Editors:
  1. Christian Hochberger

    1. Technical University of Darmstadt, Darmstadt, Germany

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  2. Brent Nelson

    1. Brigham Young University, Provo, USA

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  3. Andreas Koch

    1. Technical University of Darmstadt, Darmstadt, Germany

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  4. Roger Woods

    1. Queen’s University Belfast, Belfast, UK

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  5. Pedro Diniz

    1. INESC-ID, Lisbon, Portugal

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 11444)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

Included in the following conference series:

Conference proceedings info: ARC 2019.

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Table of contents (28 papers)

  1. Front Matter

    Pages i-xiii
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  2. Applications

    1. Front Matter

      Pages 1-1
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    2. Fault-Tolerant Architecture for On-board Dual-Core Synthetic-Aperture Radar Imaging

      • Helena Cruz, Rui Policarpo Duarte, Horácio Neto
      Pages 3-16

    3. Optimizing CNN-Based Hyperspectral Image Classification on FPGAs

      • Shuanglong Liu, Ringo S. W. Chu, Xiwei Wang, Wayne Luk
      Pages 17-31

    4. Supporting Columnar In-memory Formats on FPGA: The Hardware Design of Fletcher for Apache Arrow

      • Johan Peltenburg, Jeroen van Straten, Matthijs Brobbel, H. Peter Hofstee, Zaid Al-Ars
      Pages 32-47

    5. A Novel Encoder for TDCs

      • Günter Knittel
      Pages 48-57

    6. A Resource Reduced Application-Specific FPGA Switch

      • Qian Zhao, Yoshimasa Ohnishi, Masahiro Iida, Takaichi Yoshida
      Pages 58-67

    7. Software-Defined FPGA Accelerator Design for Mobile Deep Learning Applications

      • Panagiotis G. Mousouliotis, Loukas P. Petrou
      Pages 68-77

  3. Partial Reconfiguration and Security

    1. Front Matter

      Pages 79-79
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    2. Probabilistic Performance Modelling when Using Partial Reconfiguration to Accelerate Streaming Applications with Non-deterministic Task Scheduling

      • Bruno da Silva, An Braeken, Abdellah Touhafi
      Pages 81-95

    3. Leveraging the Partial Reconfiguration Capability of FPGAs for Processor-Based Fail-Operational Systems

      • Tobias Dörr, Timo Sandmann, Florian Schade, Falco K. Bapp, Jürgen Becker
      Pages 96-111

    4. (ReCo)Fuse Your PRC or Lose Security: Finally Reliable Reconfiguration-Based Countermeasures on FPGAs

      • Kenneth Schmitz, Buse Ustaoglu, Daniel Große, Rolf Drechsler
      Pages 112-126

    5. Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan

      • Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
      Pages 127-136

    6. Secure Local Configuration of Intellectual Property Without a Trusted Third Party

      • Nadir Khan, Arthur Silitonga, Brian Pachideh, Sven Nitzsche, Jürgen Becker
      Pages 137-146

  4. Image/Video Processing

    1. Front Matter

      Pages 147-147
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    2. HiFlipVX: An Open Source High-Level Synthesis FPGA Library for Image Processing

      • Lester Kalms, Ariel Podlubne, Diana Göhringer
      Pages 149-164

    3. Real-Time FPGA Implementation of Connected Component Labelling for a 4K Video Stream

      • Piotr Ciarach, Marcin Kowalczyk, Dominika Przewlocka, Tomasz Kryjak
      Pages 165-180

    4. A Scalable FPGA-Based Architecture for Depth Estimation in SLAM

      • Konstantinos Boikos, Christos-Savvas Bouganis
      Pages 181-196

  5. High-Level Synthesis

    1. Front Matter

      Pages 197-197
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    2. Evaluating LULESH Kernels on OpenCL FPGA

      • Zheming Jin, Hal Finkel
      Pages 199-213
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Keywords

About this book

This book constitutes the proceedings of the 15th International Symposium on Applied Reconfigurable Computing, ARC 2019, held in Darmstadt, Germany, in April 2019.

The 20 full papers and 7 short papers presented in this volume were carefully reviewed and selected from 52 submissions. In addition, the volume contains 1 invited paper. The papers were organized in topical sections named: Applications; partial reconfiguration and security; image/video processing; high-level synthesis; CGRAs and vector processing; architectures; design frameworks and methodology; convolutional neural networks.

Editors and Affiliations

  • Technical University of Darmstadt, Darmstadt, Germany

    Christian Hochberger, Andreas Koch

  • Brigham Young University, Provo, USA

    Brent Nelson

  • Queen’s University Belfast, Belfast, UK

    Roger Woods

  • INESC-ID, Lisbon, Portugal

    Pedro Diniz

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