High-Level VLSI Synthesis

1. Front Matter

   Pages i-x

   PDF

2. Essential Issues and Possible Solutions in High-Level Synthesis

   • Daniel D. Gajski

   Pages 1-26

3. Architectural synthesis for medium and high throughput signal processing with the new Cathedral environment

   • Dirk Lanneer, Stefaan Note, Francis Depuydt, Marc Pauwels, Francky Catthoor, Gert Goossens et al.

   Pages 27-54

4. PISYN — High-Level Synthesis of Application Specific Pipelined Hardware

   • Albert E. Casavant, Ki Soo Hwang, Kristen N. McNall

   Pages 55-78

5. The IBM High-Level Synthesis System

   • R. Camposano, R. A. Bergamaschi, C. E. Haynes, M. Payer, S. M. Wu

   Pages 79-104

6. MICON: Automated Design of Computer Systems

   • William P. Birmingham, Anurag P. Gupta, Daniel P. Siewiorek

   Pages 105-125

7. Cyber: High Level Synthesis System from Software into ASIC

   • Kazutoshi Wakabayashi

   Pages 127-151

8. Specification and Synthesis of Interface Logic

   • Gaetano Borriello

   Pages 153-176

9. Synthesis of ASICs with Hercules and Hebe

   • David C. Ku, Giovanni De Micheli

   Pages 177-203

10. Synthesis From Pure Behavioral Descriptions

    • Yukihiro Nakamura, Kiyoshi Oguri, Akira Nagoya

    Pages 205-229

11. Architectural Optimization Methods for Control-Dominated Machines

    • Wayne Wolf, Andrés Takach, Tien-Chien Lee

    Pages 231-254

12. Global Scheduling and Allocation Algorithms in the HAL System

    • Pierre G. Paulin

    Pages 255-281

13. High Level Synthesis in the THEDA System

    • Yu-Chin Hsu, Youn-Long Lin

    Pages 283-306

14. Industrial Uses of the System Architect’s Workbench

    • D. E. Thomas, T. E. Fuhrman

    Pages 307-329

15. Unified System Construction (USC)

    • Alice C. Parker, Kayhan Küçükçakar, Shiv Prakash, Jen-Pin Weng

    Pages 331-354

16. Scheduling and Assignment in High Level Synthesis

    • Wolfgang Rosenstiel, Heinrich Krämer

    Pages 355-382

17. Back Matter

    Pages 383-390

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The time has come for high-level synthesis. When research into synthesizing hardware from abstract, program-like de­ scriptions started in the early 1970' s, there was no automated path from the register­ transfer design produced by high-level synthesis to a complete hardware imple­ mentation. As a result, it was very difficult to measure the effectiveness of high­ level synthesis methods; it was also hard to justify to users the need to automate architecture design when low-level design had to be completed manually. Today's more mature CAD techniques help close the gap between an automat­ ically synthesized design and a manufacturable design. Market pressures encour­ age designers to make use of any and all automated tools. Layout synthesis, logic synthesis, and specialized datapath generators make it feasible to quickly imple­ ment a register-transfer design in silicon,leaving designers more time to consider architectural improvements. As IC design becomes more automated, customers are increasing their demands; today's leading edge designers using logic synthesis systems are training themselves to be tomorrow's consumers of high-level synthe­ sis systems. The need for very fast turnaround, a competitive fabrication market WhlCh makes small-quantity ASIC manufacturing possible, and the ever growing co:n­ plexity of the systems being designed, all make higher-level design automaton inevitable.

• ASIC
• Hardware
• VLSI
• algorithms
• construction
• integrated circuit
• logic
• optimization

• IBM, USA

  Raul Camposano

• Princeton University, USA

  Wayne Wolf

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