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Switch-Level Timing Simulation of MOS VLSI Circuits

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  • © 1989

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Table of contents (6 chapters)

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About this book

Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com­ puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.

Authors and Affiliations

  • University of Illinois, USA

    Vasant B. Rao, David V. Overhauser, Timothy N. Trick, Ibrahim N. Hajj

Bibliographic Information

  • Book Title: Switch-Level Timing Simulation of MOS VLSI Circuits

  • Authors: Vasant B. Rao, David V. Overhauser, Timothy N. Trick, Ibrahim N. Hajj

  • Series Title: The Springer International Series in Engineering and Computer Science

  • DOI: https://doi.org/10.1007/978-1-4613-1709-8

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Kluwer Academic Publishers 1989

  • Hardcover ISBN: 978-0-89838-302-7Published: 30 November 1988

  • Softcover ISBN: 978-1-4612-8963-0Published: 05 October 2011

  • eBook ISBN: 978-1-4613-1709-8Published: 06 December 2012

  • Series ISSN: 0893-3405

  • Edition Number: 1

  • Number of Pages: XII, 210

  • Topics: Circuits and Systems, Electrical Engineering

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