Low-Energy FPGAs — Architecture and Design

1. Front Matter

   Pages i-3

   PDF

2. Introduction

   • Varghese George, Jan M. Rabaey

   Pages 5-25

3. Power Dissipation in FPGAs

   • Varghese George, Jan M. Rabaey

   Pages 27-41

4. Exploration Environment

   • Varghese George, Jan M. Rabaey

   Pages 43-68

5. Logic and Interconnect Architecture

   • Varghese George, Jan M. Rabaey

   Pages 69-94

6. Circuit Techniques

   • Varghese George, Jan M. Rabaey

   Pages 95-110

7. Configuration Energy

   • Varghese George, Jan M. Rabaey

   Pages 111-125

8. Hardware Implementation

   • Varghese George, Jan M. Rabaey

   Pages 127-149

9. Results

   • Varghese George, Jan M. Rabaey

   Pages 151-161

10. Conclusion

    • Varghese George, Jan M. Rabaey

    Pages 163-170

11. Back Matter

    Pages 171-182

    PDF

Low-Energy FPGAs: Architecture and Design is a primary resource for both researchers and practicing engineers in the field of digital circuit design.
The book addresses the energy consumption of Field-Programmable Gate Arrays (FPGAs). FPGAs are becoming popular as embedded components in computing platforms. The programmability of the FPGA can be used to customize implementations of functions on an application basis. This leads to performance gains, and enables reuse of expensive silicon.
Chapter 1 provides an overview of digital circuit design and FPGAs. Chapter 2 looks at the implication of deep-submicron technology onFPGA power dissipation. Chapter 3 describes the exploration environment to guide and evaluate design decisions. Chapter 4 discusses the architectural optimization process to evaluate the trade-offs between the flexibility of the architecture, and the effect on the performance metrics. Chapter 5 reviews different circuit techniques to reduce the performance overhead of some of the dominant components. Chapter 6 shows methods to configure FPGAs to minimize the programming overhead. Chapter 7 addresses the physical realization of some of the critical components and the final implementation of a specific low-energy FPGA. Chapter 8 compares the prototype array to an equivalent commercial architecture.

• FPGA
• Field Programmable Gate Array
• Hardware
• architecture
• circuit design
• consumption
• gate array
• interconnect
• logic
• optimization
• programming

• STMicroelectronics, Switzerland

  Varghese George

• University of California, Berkeley, USA

  Jan M. Rabaey

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