System and Architecture

1. Front Matter

   Pages i-xv

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2. A Mathematical AI-Based Diet Analysis and Transformation Model

   • L. K. Gautam, S. A. Ladhake

   Pages 1-7

3. Energy Efficient Measures for Sustainable Development of Data Centers

   • Taniya Aggarwal, Saurabh Khatri, Anu Singla

   Pages 9-19

4. Analysis on Multiple Combinations of Series–Parallel Connections of Super Capacitors for Maximum Energy Transferring to Load in Minimum Time

   • Pankaj R. Sawarkar, Akhilesh A. Nimje, Praful P. Kumbhare

   Pages 21-34

5. Design and Simulation of OTA Using 45 nm Technology

   • Amit Sharma, Sansar Chand, Navneet Gill

   Pages 35-41

6. Design and Analysis of Microstrip Patch Antenna Using DRAF

   • Lohini Walia, Gaurav Walia, Umesh Pal Singh

   Pages 43-51

7. Principal Component Analysis-Based Block Diagonalization Precoding Algorithm for MU-MIMO System

   • S. B. M. Priya, P. Kumar

   Pages 53-61

8. Low-Power High-Performance Multitransform Architecture Using Run-Time Reconfigurable Adder for FPGA and ASIC Implementation

   • K. Sivanandam, P. Kumar

   Pages 63-72

9. A Review of Dynamic Scheduling Algorithms for Homogeneous and Heterogeneous Systems

   • Mahfooz Alam, Asif Khan, Ankur K. Varshney

   Pages 73-83

10. Effective Information Retrieval Algorithm for Linear Multiprocessor Architecture

    • Zaki Ahmad Khan, Jamshed Siddiqui, Abdus Samad

    Pages 85-94

11. Design of Energy-Efficient Random Access Memory Circuit Using Low-Voltage CMOS and High-Speed Transreceiver Logic-I I/O Standard on 28 nm FPGA

    • Tarun Agrawal, Vivek Srivastava

    Pages 95-106

12. Stub Series Terminal Logic-Based Low-Power Thermal-Aware Vedic Multiplier Design on 40-nm FPGA

    • Arushi Aggarwal, Bishwajeet Pandey, Sweety Dabbas, Achal Agarwal, Siddharth Saurabh

    Pages 107-113

13. LVCMOS-Based Low-Power Thermal-Aware Energy-Proficient Vedic Multiplier Design on Different FPGAs

    • Arushi Aggarwal, Bishwajeet Pandey, Sweety Dabbas, Achal Agarwal, Siddharth Saurabh

    Pages 115-122

14. Timing Constraints-Based High-Performance DES Design and Implementation on 28-nm FPGA

    • Vandana Thind, Sujeet Pandey, D. M. Akbar Hussain, Bhagwan Das, M. F. L. Abdullah, Bishwajeet Pandey

    Pages 123-137

15. Input–Output Standard-Based Energy Efficient UART Design on 90 nm FPGA

    • Rashmi Sharma, Bishwajeet Pandey, Vikas Jha, Siddharth Saurabh, Sweety Dabas

    Pages 139-150

16. Different Configuration of Low-Power Memory Design Using Capacitance Scaling on 28-nm Field-Programmable Gate Array

    • Inderpreet Kaur, Lakshay Rohilla, Alisha Nagpal, Bishwajeet Pandey, Sanchit Sharma

    Pages 151-161

17. Ardudroid Surveillance Bot

    • Himanshu Verma, Gaurav Verma, Jaswanth Yarlagadda, Ashish Sharma, Sandeep Banarwal

    Pages 163-173

18. Development of Cross-Toolchain and Linux Device Driver

    • Gaurav Verma, Mohammad Imdad, Sandeep Banarwal, Himanshu Verma, Ashish Sharma

    Pages 175-185

19. Design and Implementation of a Green Traffic Light Controller on FPGA Using VHDL

    • Saumil Sachdeva, Sarthak Chowdhury, Sushant Shekhar, Gaurav Verma

    Pages 187-192

20. Suboptimal Controller Design for Power System Model

    • Shabana Urooj, Abeer Z. Alalmaie

    Pages 193-200

This book comprises the select proceedings of the annual convention of the Computer Society of India. Divided into 10 topical volumes, the proceedings present papers on state-of-the-art research, surveys, and succinct reviews. The volumes cover diverse topics ranging from parallel processing to system buses, and from computer architecture to VLIW (very long instruction word). This book focuses on systems and architecture. It aims at informing the readers about those attributes of a system visible to a programmer. This book also deals with various innovations and improvements in computing technologies to improve the size, capacity and performance of modern-day computing systems. The contents of this book will be useful to professionals and researchers alike.

• Hardware
• Computer Organization
• System Architectures
• Microprogramming
• CSI 2015
• Digital Life

• Department of Computer Science, University of Delhi, Delhi, India

  Sunil Kumar Muttoo

Prof. Sunil Kumar Muttoo is working as a Professor and Head of the Department of Computer Science, University of Delhi. He completed his M.Sc., M.Phil., Ph.D. at the University of Delhi and his M.Tech. (Computer Science and Data Processing, CSDP) at the Indian Institute of Technology Kharagpur (IIT-KGP). He is involved in research in the field of steganography and digital watermarking. He has published more than sixty papers in international/national journals and conference/workshop proceedings. He has more than 30 years of teaching and research experience.

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