Computer Engineering and Technology

1. Front Matter

   Pages I-X

   PDF

2. Processor Architecture

   1. Front Matter

      Pages 1-1

      PDF

   2. Single/Double Precision Floating-Point Division and Square Root Unit Based on SRT-8 Algorithm

      • Yuanxi Peng, Tingting He, Yuanwu Lei, Baozhou Zhu

      Pages 3-14

   3. Language-Extension-Based Vectorizing Compiling Scheme on SDR-DSP

      • Xiaoqiang Ni, Liu Yang, Chiyuan Ma

      Pages 15-23

   4. A Methodology for Performance Verification of Microprocessors

      • Yongwen Wang, Libo Huang, Zhong Zheng

      Pages 24-31

   5. A Novel L1 Cache Based on Volatile STT-RAM

      • Zhang Hongguang, Zhang Minxuan

      Pages 32-39

   6. A New DVFS Algorithm Design for Multi-core Processor Chip

      • Chengyi Zhang, Jiming Wang, Minxuan Zhang, Xiangdi Wu

      Pages 40-51

3. Application Specific Processors

   1. Front Matter

      Pages 53-53

      PDF

   2. A Novel Low-Power and High-PSNR Architecture Based on ARC for DCT/IDCT

      • Yiliu Feng, Jianfeng Zhang, Hengzhu Liu

      Pages 55-68

   3. Microsecond-Level Temperature Variation of Logic Circuits and Influences of Infrared Cameras’ Parameters on Hardware Trojans Detection

      • Yongkang Tang, Jianye Wang, Shaoqing Li, Jihua Chen, Binbin Yang

      Pages 69-80

   4. BFDir: A Space-Efficient Coherence Directory Based on Bloom Filter

      • Jicheng Chen, Yaqian Zhao, Hongzhi Shi, Yihan Li

      Pages 81-93

   5. FPGA-Based High Throughput TDMP LDPC Decoder

      • Ruochen Liao, Yuzhuo Fu, Ting Liu

      Pages 94-101

   6. A Dynamic Multi-precision Fixed-Point Data Quantization Strategy for Convolutional Neural Network

      • Lei Shan, Minxuan Zhang, Lin Deng, Guohui Gong

      Pages 102-111

4. Computer Application and Software Optimization

   1. Front Matter

      Pages 113-113

      PDF

   2. Optimization of Two Bottleneck Programs in SAR System on GPGPU

      • Yang Zhang, Zuocheng Xing, Cang Liu, Chuan Tang, Lirui Chen, Qinglin Wang

      Pages 115-124

   3. A Channel-Level RAID5 Schema Based Physical Address in SSD

      • Ya Feng, Yuxuan Xing, Nong Xiao, Fang Liu

      Pages 125-135

   4. Unification Protection Design for a Certain Type of Vehicle-Borne Server

      • Chengkuan Sun, Jianping Cai, Wanli Sha, Shangyong Liang

      Pages 136-148

   5. Monaural Speech Separation on Many Integrated Core Architecture

      • Wang He, Xu Weixia, Guan Naiyang, Yang Canqun

      Pages 149-156

   6. An AWGR-Based High Performance Optical Interconnect Architecture for Exascale Systems

      • Shi Xu, Lei Zhang, Zhiling Li

      Pages 157-167

   7. Accelerating Nyström Kernel Independent Component Analysis with Many Integrated Core Architecture

      • Lei Shan, He Wang, Weixia Xu, Canqun Yang, Minxuan Zhang

      Pages 168-176

This book constitutes the refereed proceedings of the 20th CCF Conference on Computer Engineering and Technology, NCCET 2016, held in Xi'an, China, in August 2016. 
The 21 full papers presented were carefully reviewed and selected from 120 submissions. They are organized in topical sections on processor architecture; application specific processors; computer application and software optimization; technology on the horizon.

• Computer architecture
• Computer processor
• Integrated circuit
• Performance evaluation
• Algorithm design
• Hardware validation

• National University of Defense Technology, Changsha, China

  Weixia Xu, Liquan Xiao, Jinwen Li, Chengyi Zhang, Zhenzhen Zhu

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