Planar Processing Primer

1. Front Matter

   Pages i-xiii

   PDF

2. Planar Processing and Basic Devices

   • George E. Anner

   Pages 1-37

3. Wafers

   • George E. Anner

   Pages 39-75

4. Wafer Measurements

   • George E. Anner

   Pages 77-114

5. Equilibrium Concepts

   • George E. Anner

   Pages 115-144

6. Oxidation

   • George E. Anner

   Pages 145-195

7. Diffusion: Predeposition

   • George E. Anner

   Pages 197-254

8. Diffusion; Redistribution

   • George E. Anner

   Pages 255-310

9. Ion Implantation

   • George E. Anner

   Pages 311-358

10. Chemical Vapor Deposition; Epitaxy

    • George E. Anner

    Pages 359-399

11. Etching

    • George E. Anner

    Pages 401-438

12. Lithography

    • George E. Anner

    Pages 439-491

13. Physical Vapor Deposition; Sputtering

    • George E. Anner

    Pages 493-534

14. Back Matter

    Pages 535-634

    PDF

Planar Processing Primer is based on lecture notes for a silicon planar process­ ing lecture/lab course offered at the University of Illinois-UC for over fifteen years. Directed primarily to electrical engineering upperclassmen and graduate students, the material also has been used successfully by graduate students in physics and ceramic and metallurgical engineering. It is suitable for self-study by engineers trained in other disciplines who are beginning work in the semiconductor fields, and it can make circuit design engineers aware of the processing limitations under which they must work. The text describes and explains, at an introductory level, the principal processing steps used to convert raw silicon into a semiconductor device or integrated circuit. First-order models are used for theoretical treatments (e.g., of diffusion and ion implantation), with reference made to more advanced treatments, to computer programs such as SUPREM that include higher order effects, and to interactions among sequential processes. In Chapters 8, 9, and to, the application of silicon processes to compound semiconductors is discussed briefly. Over the past several years, the size of transistors has decreased markedly, allowing more transistors per chip unit area, and chip size has increased.

• Magnetron
• bipolar junction transistor
• bipolar power transistor
• ceramics
• circuit
• electrical engineering
• epitaxy
• growth
• integrated circuit
• material
• physics
• plasma etching
• semiconductor
• semiconductor device
• transistor

• University of Illinois, Champaign-Urbana, USA

  George E. Anner

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