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VLSI 2010 Annual Symposium

Selected papers

  • Conference proceedings
  • © 2011

Overview

Editors:
  1. Nikolaos Voros

    1. Messolonghi, Dept. Telecommunication Systems &, Technological Educational Institute of, Nafpaktos, Greece

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  2. Amar Mukherjee

    1. School of Electrical Engineering &, Computer Science, University of Central Florida, Orlando, USA

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  3. Nicolas Sklavos

    1. , Informatics & MM, Technological Educational Institute of P, Pyrgos, Greece

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  4. Konstantinos Masselos

    1. , Dept. of Computer Science and Technology, University of Peloponnese, Tripolis, Greece

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  5. Michael Huebner

    1. , Institut für Technik der Informationsver, Karlsruhe Institute of Technology, Karlsruhe, Germany

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  • Invited, selected and awarded papers from one of the most well known conferences in VLSI Novel research work from leading scientists from newly emerging areas of nanoelectronics, MEMS and molecular, biological and quantum computing
  • Papers from different but relevant areas targeting to a wide audience ranging from undergraduate/postgraduate students to leading scientists and practitioners

Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 105)

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Table of contents (20 papers)

  1. Front Matter

    Pages i-x
    Download chapter PDF

  2. Architecture: Level Design Solutions

    1. Front Matter

      Pages 1-1
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  3. Architecture - Level Design Solutions

    1. Intelligent NOC Hotspot Prediction

      • Elena Kakoulli, Vassos Soteriou, Theocharis Theocharides
      Pages 3-16

    2. Accurate Asynchronous Network-on-Chip Simulation Based on a Delay-Aware Model

      • Naoya Onizawa, Tomoyoshi Funazaki, Atsushi Matsumoto, Takahiro Hanyu
      Pages 17-30

    3. Trust Management Through Hardware Means: Design Concerns and Optimizations

      • Apostolos P. Fournaris, Daniel M. Hein
      Pages 31-45

    4. MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures

      • Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martinez et al.
      Pages 47-63

    5. 2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures

      • C. Silvano, W. Fornaciari, S. Crespi Reghizzi, G. Agosta, G. Palermo, V. Zaccaria et al.
      Pages 65-79

  4. Embedded System Design

    1. Front Matter

      Pages 81-81
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    2. Adaptive Task Migration Policies for Thermal Control in MPSoCs

      • David Cuesta, Jose Ayala, Jose Hidalgo, David Atienza, Andrea Acquaviva, Enrico Macii
      Pages 83-115

    3. A High Level Synthesis Exploration Framework with Iterative Design Space Partitioning

      • Sotirios Xydis, Kiamal Pekmestzi, Dimitrios Soudris, George Economakos
      Pages 117-131

    4. A Scalable Bandwidth-Aware Architecture for Connected Component Labeling

      • Vikram Sampath Kumar, Kevin Irick, Ahmed Al Maashri, Vijaykrishnan Narayanan
      Pages 133-149

    5. The SATURN Approach to SysML-Based HW/SW Codesign

      • Wolfgang Mueller, Da He, Fabian Mischkalla, Arthur Wegele, Adrian Larkham, Paul Whiston et al.
      Pages 151-164

    6. Mapping Embedded Applications on MPSoCs: The MNEMEE Approach

      • Christos Baloukas, Lazaros Papadopoulos, Dimitrios Soudris, Sander Stuijk, Olivera Jovanovic, Florian Schmoll et al.
      Pages 165-179

    7. The MOSART Mapping Optimization for Multi-Core ARchiTectures

      • Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas et al.
      Pages 181-195

  5. Emerging Devices and Nanocomputing

    1. Front Matter

      Pages 197-197
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    2. XMSIM: Extensible Memory Simulator for Early Memory Hierarchy Evaluation

      • Theodoros Lioris, Grigoris Dimitroulakos, Kostas Masselos
      Pages 199-216

    3. Self-Freeze Linear Decompressors: Test Pattern Generators for Low Power Scan Testing

      • Vasileios Tenentes, Xrysovalantis Kavousianos
      Pages 217-230

    4. SUT-RNS Forward and Reverse Converters

      • E. Vassalos, D. Bakalis, H. T. Vergos
      Pages 231-244

    5. Off-Chip SDRAM Access Through Spidergon STNoC

      • Khaldon Hassan, Marcello Coppola
      Pages 245-261

    6. Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore

      • Krishnendu Chakrabarty, Yang Zhao
      Pages 263-285
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Keywords

About this book

VLSI 2010 Annual Symposium will present extended versions of the best papers presented in ISVLSI 2010 conference. The areas covered by the papers will include among others: Emerging Trends in VLSI, Nanoelectronics, Molecular, Biological and Quantum Computing. MEMS, VLSI Circuits and Systems, Field-programmable and Reconfigurable Systems, System Level Design, System-on-a-Chip Design, Application-Specific Low Power, VLSI System Design, System Issues in Complexity, Low Power, Heat Dissipation, Power Awareness in VLSI Design, Test and Verification, Mixed-Signal Design and Analysis, Electrical/Packaging Co-Design, Physical Design, Intellectual property creating and sharing.

Editors and Affiliations

  • Messolonghi, Dept. Telecommunication Systems &, Technological Educational Institute of, Nafpaktos, Greece

    Nikolaos Voros

  • School of Electrical Engineering &, Computer Science, University of Central Florida, Orlando, USA

    Amar Mukherjee

  • , Informatics & MM, Technological Educational Institute of P, Pyrgos, Greece

    Nicolas Sklavos

  • , Dept. of Computer Science and Technology, University of Peloponnese, Tripolis, Greece

    Konstantinos Masselos

  • , Institut für Technik der Informationsver, Karlsruhe Institute of Technology, Karlsruhe, Germany

    Michael Huebner

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