Skip to main content
SpringerLink
Log in
Book cover

Emerging Technologies and Circuits

  • Book
  • © 2010

Overview

Editors:
  1. Amara Amara

    1. Paris (ISEP), Institut Supérieur d’Electronique de, Paris, France

    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  2. Thomas Ea

    1. Inst.Supérieur d’Electronique de Paris, Paris, France

    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  3. Marc Belleville

    1. CEA-LETI Minatec, Grenoble cedex 9, France

    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  • Covers different aspects of emerging technology and devices
  • Covers different aspects of advanced devices and circuits
  • Covers different aspects of reliability and SEU
  • Covers different aspects of power, timing and variability,
  • Covers different aspects of analog and mixed signal.
  • Includes supplementary material: sn.pub/extras

Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 66)

This is a preview of subscription content, log in via an institution to check access.

Access this book

Log in via an institution
eBook USD 129.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

Licence this eBook for your library

Institutional subscriptions

Table of contents (17 chapters)

  1. Front Matter

    Pages i-ix
    Download chapter PDF

  3. Emerging Technologies and Circuits

    1. Front Matter

      Pages 15-15
      Download chapter PDF

    2. New State Variable Opportunities Beyond CMOS: A System Perspective

      • Victor V. Zhirnov, Ralph K. Cavin, George I. Bourianoff
      Pages 17-35

    3. A Simple Compact Model to Analyze the Impact of Ballistic and Quasi-Ballistic Transport on Ring Oscillator Performance

      • S. Martinie, D. Munteanu, G. Le Carval, J. L. Autran
      Pages 37-51

  4. Advanced Devices and Circuits

    1. Front Matter

      Pages 53-53
      Download chapter PDF

    2. Low-Voltage Scaled 6T FinFET SRAM Cells

      • N. Collaert, K. von Arnim, R. Rooyackers, T. Vandeweyer, A. Mercha, B. Parvais et al.
      Pages 55-66

    3. Independent-Double-Gate FINFET SRAM Cell for Drastic Leakage Current Reduction

      • Kazuhiko Endo, Shin-ichi O’uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto et al.
      Pages 67-79

    4. Metal Gate Effects on a 32 nm Metal Gate Resistor

      • Thuy Dao, Ik_Sung Lim, Larry Connell, Dina H. Triyoso, Youngbog Park, Charlie Mackenzie
      Pages 81-93

  5. Reliability and SEU

    1. Front Matter

      Pages 95-95
      Download chapter PDF

    2. Threshold Voltage Shift Instability Induced by Plasma Charging Damage in MOSFETS with High-K Dielectric

      • Koji Eriguchi, Masayuki Kamei, Kenji Okada, Hiroaki Ohta, Kouichi Ono
      Pages 97-106

    3. Analysis of SI Substrate Damage Induced by Inductively Coupled Plasma Reactor with Various Superposed Bias Frequencies

      • Y. Nakakubo, A. Matsuda, M. Kamei, H. Ohta, K. Eriguchi, K. Ono
      Pages 107-120

  6. Power, Timing and Variability

    1. Front Matter

      Pages 121-121
      Download chapter PDF

    2. CMOS SOI Technology for WPAN: Application to 60 GHZ LNA

      • A. Siligaris, C. Mounet, B. Reig, P. Vincent, A. Michel
      Pages 123-130

    3. SRAM Memory Cell Leakage Reduction Design Techniques in 65 nm Low Power PD-SOI CMOS

      • Olivier Thomas, Marc Belleville, Richard Ferrant
      Pages 131-139

    4. Resilient Circuits for Dynamic Variation Tolerance

      • Keith A. Bowman, James W. Tschanz
      Pages 141-161

    5. Process Variability-Induced Timing Failures – A Challenge in Nanometer CMOS Low-Power Design

      • Xiaonan Zhang, Xiaoliang Bai
      Pages 163-177

    6. How Does Inverse Temperature Dependence Affect Timing Sign-Off

      • Sean H. Wu, Alexander Tetelbaum, Li-C. Wang
      Pages 179-189

    7. CMOS Logic Gates Leakage Modeling Under Statistical Process Variations

      • Carmelo D’Agostino, Philippe Flatresse, Edith Beigne, Marc Belleville
      Pages 191-202
Back to top

Keywords

About this book

With the semiconductor market growth, new Integrated Circuit designs are pushing the limit of the technology and in some cases, require specific fine-tuning of certain process modules in manufacturing. Thus the communities of design and technology are increasingly intertwined. The issues that require close interactions and collaboration for trade-off and optimization across the design/device/process fields are addressed in Emerging Technologies and Circuits. It contains a set of outstanding papers, keynote and tutorials presented during 3 days at the International Conference On Integrated Circuit Design and Technology (ICICDT) held in June 2008 in Minatec, Grenoble. The selected papers are spread over 5 chapters covering various aspects of emerging technologies and devices, advanced circuit design, reliability, variability issues and solutions, advanced memories and analog and mixed signals. All these papers are focusing on design and technology interactions and comply with the scope of the conference.

Editors and Affiliations

  • Paris (ISEP), Institut Supérieur d’Electronique de, Paris, France

    Amara Amara

  • Inst.Supérieur d’Electronique de Paris, Paris, France

    Thomas Ea

  • CEA-LETI Minatec, Grenoble cedex 9, France

    Marc Belleville

Bibliographic Information

  • Book Title: Emerging Technologies and Circuits

  • Editors: Amara Amara, Thomas Ea, Marc Belleville

  • Series Title: Lecture Notes in Electrical Engineering

  • DOI: https://doi.org/10.1007/978-90-481-9379-0

  • Publisher: Springer Dordrecht

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer Science+Business Media B.V. 2010

  • Hardcover ISBN: 978-90-481-9378-3Published: 29 September 2010

  • Softcover ISBN: 978-94-007-3353-4Published: 07 November 2012

  • eBook ISBN: 978-90-481-9379-0Published: 28 September 2010

  • Series ISSN: 1876-1100

  • Series E-ISSN: 1876-1119

  • Edition Number: 1

  • Number of Pages: X, 266

  • Topics: Circuits and Systems, Nanotechnology, Memory Structures

Publish with us

Policies and ethics

Back to top

Search

Navigation