Simulation of Semiconductor Processes and Devices 2004

1. Front Matter

   Pages i-xii

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2. Advanced Transport Models for Sub-Micrometer Devices

   • T. Grasser, C. Jungemann, H. Kosina, B. Meinerzhagen, S. Selberherr

   Pages 1-8

3. NEMO 1-D: the first NEGF-based TCAD tool

   • Gerhard Klimeck

   Pages 9-12

4. The Density-Gradient Correction as a Disguised Pilot Wave of de Broglie

   • M. Rudan, E. Gnani, S. Reggiani, G. Baccarani

   Pages 13-16

5. Full Band and Approximated Solutions of the Schrödinger Equation in Silicon Inversion layers

   • David Esseni, Pierpaolo Palestri

   Pages 17-20

6. A Hybrid 3D Quantum Mechanical Simulation of FinFETs and Nanowire Devices

   • Xue Shao, Zhiping Yu

   Pages 21-24

7. On the Calculation of Quasi-Bound States and Their Impact on Direct Tunneling in CMOS Devices

   • A. Gehring, S. Selberherr

   Pages 25-28

8. Quantum Mechanical Simulation in DG MOSFETs Based on a Tight Binding Green’s Function Formalism

   • M. Ogawa, N. Kagotani, M. Ohta, T. Miyoshi

   Pages 29-32

9. Modeling B Uphill Diffusion in the Presence of Ge

   • Ljubo Radic, Antonio F. Saavedra, Mark E. Law

   Pages 33-36

10. Ab-initio Calculations to Predict Stress Effects on Boron Solubility in Silicon

    • Milan Diebel, Srini Chakravarthi, Scott T. Dunham, Charles F. Machala

    Pages 37-40

11. Boron Diffusion in Strained and Strain-Relaxed SiGe

    • C. C. Wang, T. Y. Huang, Y. M. Sheu, Ray Duffy, Anco Heringa, N. E. B. Cowern et al.

    Pages 41-44

12. Modeling dopant diffusion in SiGe and SiGeC layers

    • A. Pakfar, P. Holliger, A. Poncet, C. Fellous, D. Dutartre, T. Schwartzmann et al.

    Pages 45-48

13. Continuum Modeling of Indium to Predict SSR Profiles

    • S. Chakravarthi, P. R. Chidambaram, B. Hornung, C. F. Machala

    Pages 49-52

14. Theoretical Analysis of Stress and Surface Orientation Effects on Inversion Carrier Mobility

    • T. Ezaki, H. Nakamura, T. Yamamoto, K. Takeuchi, M. Hane

    Pages 53-56

15. CMOS Circuit Performance Enhancement by Surface Orientation Optimization

    • Leland Chang, Meikei Ieong, Min Yang

    Pages 57-60

16. Modeling of Stress Induced Layout Effect on Electrical Characteristics of Advanced MOSFETs

    • O. Fujii, H. Yoshimura, R. Hasumi, T. Sanuki, H. Oyamatsu, F. Matsuoka et al.

    Pages 61-64

17. Hole Mobility Enhancement Modeling and Scaling Study for High Performance Strained Ge Buried Channel PMOSFETs

    • Xinlin Wang, Huiling Shang, Phil Oldiges, Ken Rim, Steve Koester, Meikei Ieong

    Pages 65-68

18. Three-Dimensional Characterization and Modeling of Stress Distribution in High-Density DRAM Memory Cells

    • Jian Li, Robert Hull, Rongsheng Yang, Vincent Hou, Chandra Mouli

    Pages 69-72

19. Strain Optimization to Reduce Gate Leakage Current in MOS Transistors with Silicon Oxynitride Gate Dielectrics by Use of First-Principles Calculations

    • Yoshiharu Kanegae, Hiroshi Moriya, Tomio Iwasaki

    Pages 73-76

20. Simulation Study of Simple CMOS-Compatible Thin-SOI Vertical Bipolar Transistors on Thin BOX with an Inversion Collector

    • Qiqing Christine Ouyang, Tak H. Ning

    Pages 77-80

This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004. The conference program included 7 invited plenary lectures and 82 contributed papers for oral or poster presentation, which were carefully selected out of a total of 151 abstracts submitted from 14 countries around the world. Like the previous meetings, SISPAD 2004 provided a world-wide forum for the presentation and discussion of recent advances and developments in the theoretical description, physical modeling and numerical simulation and analysis of semiconductor fabrication processes, device operation and system performance. The variety of topics covered by the conference contributions reflects the physical effects and technological problems encountered in consequence of the progressively shrinking device dimensions and the ever-growing complexity in device technology.

• Doping
• Layout
• Signal
• Simulation
• algorithm
• device operation
• device technology
• fabrication processes
• modeling
• numerical analysis
• numerical simulation
• optimization
• physical modeling
• system performance
• thin film

• Lehrstuhl für Technische Elektrophysik, Technische Universität München, Munich, Federal Republic of Germany

  Gerhard Wachutka, Gabriele Schrag

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