Design Concepts for a Virtualizable Embedded MPSoC Architecture

1. Front Matter

   Pages I-XXVI

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2. The “Nulticore” Dilemma

   • Alexander Biedermann

   Pages 1-3

3. Virtualizable Architecture for embedded MPSoC

   • Alexander Biedermann

   Pages 5-105

4. The Virtualizable MPSoC: Requirements, Concepts, and Design Flows

   • Alexander Biedermann

   Pages 107-147

5. Application Scenarios

   • Alexander Biedermann

   Pages 149-184

6. Conclusion and Outlook

   • Alexander Biedermann

   Pages 185-187

7. Back Matter

   Pages 189-208

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Alexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides comprehensive design flows for the design of embedded multi-processor systems-on-chip.

• Dynamic Reconfiguration
• FPGA
• Multi-Processor System-on-Chip
• Virtualization
• embedded systems

• ICS, TU Darmstadt, Darmstadt, Germany

  Alexander Biedermann

Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universität Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss.

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