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Field-Programmable Logic, Smart Applications, New Paradigms and Compilers

6th International Workshop on Field-Programmable Logic and Applications, FPL '96, Darmstadt, Germany, September 23 - 25, Proceedings

  • Conference proceedings
  • © 1996

Overview

Editors:
  1. Reiner W. Hartenstein
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  2. Manfred Glesner
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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 1142)

Included in the following conference series:

Conference proceedings info: FPL 1996.

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Table of contents (50 papers)

  1. Front Matter

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  2. Portable pipeline synthesis for FCCMs

    • Markus Weinhardt
    Pages 1-13

  3. Performance-directed technology mapping for LUT-based FPGAs — What role do decomposition and covering play?

    • Christian Legl, Klaus Eckl, Bernd Wurth
    Pages 14-23

  4. A framework for developing parametrised FPGA libraries

    • W. Luk, S. Guo, N. Shirazi, N. Zhuang
    Pages 24-33

  5. FACT: Co-evaluation environment for FPGA architecture and CAD system

    • Toshiaki Miyazaki, Akihiro Tsutsui, Kenji Ishii, Naohisa Ohta
    Pages 34-43

  6. An universal CLA adder generator for SRAM-based FPGAs

    • Jörn Stohmann, Erich Barke
    Pages 44-54

  7. An emulation system of the WASMII: A data driven computer on a virtual hardware

    • Yuichiro Shibata, Xiao-ping Ling, Hideharu Amano
    Pages 55-64

  8. Costum computing machines vs. Hardware/Software Co-Design: From a globalized point of view

    • Reiner W. Hartenstein, Jürgen Becker, Rainer Kress
    Pages 65-76

  9. The design of a coprocessor board using Xilinx's XC6200 FPGA — An experience report

    • Stefan H. -M. Ludwig
    Pages 77-86

  10. RACE: Reconfigurable and adaptive computing environment

    • Doug Smith, Dinesh Bhatia
    Pages 87-95

  11. Computing 2-D DFTs using FPGAs

    • Chris H. Dick
    Pages 96-105

  12. CAPpartx: Computer aided prototyping partitioning for Xilinx FPGAs, a hierarchical partitioning tool for rapid prototyping

    • Ulrike Ober, Manfred Glesner, Hans-Jürgen Herpel
    Pages 106-115

  13. Architectural synthesis and efficient circuit implementation for field programmable gate arrays

    • D. W. Trainor, R. F. Woods
    Pages 116-125

  14. RaPiD — Reconfigurable pipelined datapath

    • Carl Ebeling, Darren C. Cronquist, Paul Franklin
    Pages 126-135

  15. Solving satisfiability problems on FPGAs

    • Takayuki Suyama, Makoto Yokoo, Hiroshi Sawada
    Pages 136-145

  16. FPGA implementation of the block-matching algorithm for motion estimation in image coding

    • César Sanz, Laura de Zulueta, Juan M. Meneses
    Pages 146-155

  17. Parallel CRC computation in FPGAs

    • Michael Braun, Jörg Friedrich, Thomas Grün, Josef Lembert
    Pages 156-165

  18. Coherent demodulation with FPGAs

    • U. Meyer-Bäse
    Pages 166-175

  19. The Trianus system and its application to custom computing

    • Stephan Gehring, Stefan Ludwig
    Pages 176-184

  20. Logic synthesis for FPGAs using a mixed exclusive-/inclusive-OR form

    • Nigel Lester, Jonathan Saul
    Pages 185-192
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Other volumes

  1. Field-Programmable Logic Smart Applications, New Paradigms and Compilers

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About this book

This book constitutes the refereed proceedings of the 6th International Workshop of Field-Programmable Logic and Applications, FPL '96, held in Darmstadt, Germany, in September 1996.
The 37 revised full papers presented in the book are selected from 82 submissions originating from 27 countries; also included are 13 high-quality poster presentations. The book is divided into topical sections on high-level design, new software and hardware development tools, custom computers, applications, hardware/software co-design, AISC emulators, vendor session, industrial applications and experiences, reconfiguration aspects, CAD user experiences, and miscellaneous.

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