Cryptographic Hardware and Embedded Systems - CHES 2001

1. Front Matter

   Pages I-XIV

   PDF

2. Invited Talk

   1. Protecting Embedded Systems— The Next Ten Years

      • Ross Anderson

      Pages 1-2

3. Side Channel Attacks I

   1. A Sound Method for Switching between Boolean and Arithmetic Masking

      • Louis Goubin

      Pages 3-15

   2. Fast Primitives for Internal Data Scrambling in Tamper Resistant Hardware

      • Eric Brier, Helena Handschuh, Christophe Tymen

      Pages 16-27

   3. Random Register Renaming to Foil DPA

      • D. May, H. L. Muller, N. P. Smart

      Pages 28-38

   4. Randomized Addition-Subtraction Chains as a Countermeasure against Power Attacks

      • Elisabeth Oswald, Manfred Aigner

      Pages 39-50

4. Rijndael Hardware Implementations

   1. Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm

      • Henry Kuo, Ingrid Verbauwhede

      Pages 51-64

   2. High Performance Single-Chip FPGA Rijndael Algorithm Implementations

      • Máire McLoone, J.V McCanny

      Pages 65-76

   3. Two Methods of Rijndael Implementation in Reconfigurable Hardware

      • Viktor Fischer, Miloš Drutarovský

      Pages 77-92

5. Random Number Generators

   1. Pseudo-random Number Generation on the IBM 4758 Secure Crypto Coprocessor

      • Nick Howgrave-Graham, Joan Dyer, Rosario Gennaro

      Pages 93-102

   2. Efficient Online Tests for True Random Number Generators

      • Werner Schindler

      Pages 103-117

6. Elliptic Curve Algorithms

   1. The Hessian Form of an Elliptic Curve

      • N. P. Smart

      Pages 118-125

   2. Efficient Elliptic Curve Cryptosystems from a Scalar Multiplication Algorithm with Recovery of the y-Coordinate on a Montgomery-Form Elliptic Curve

      • Katsuyuki Okeya, Kouichi Sakurai

      Pages 126-141

   3. Generating Elliptic Curves of Prime Order

      • Erkay Savaş, Thomas A. Schmidt, Çetin K. Koç

      Pages 142-158

7. Invited Talk

   1. New Directions in Croptography

      • Adi Shamir

      Pages 159-159

8. Arithmetic Architectures

   1. A New Low Complexity Parallel Multiplier for a Class of Finite Fields

      • Manuel Leone

      Pages 160-170

   2. Efficient Rijndael Encryption Implementation with Composite Field Arithmetic

      • Atri Rudra, Pradeep K. Dubey, Charanjit S. Jutla, Vijay Kumar, Josyula R. Rao, Pankaj Rohatgi

      Pages 171-184

   3. High-Radix Design of a Scalable Modular Multiplier

      • Alexandre F. Tenca, Georgi Todorov, Çetin K. Koç

      Pages 185-201

   4. A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2^m)

      • Johann Großschädl

      Pages 202-219

9. Cryptanalysis

   1. Attacks on Cryptoprocessor Transaction Sets

      • Mike Bond

      Pages 220-234

These are the proceedings of CHES 2001, the third Workshop on Cryptographic Hardware and Embedded Systems. The ?rst two CHES Workshops were held in Massachusetts, and this was the ?rst Workshop to be held in Europe. There was a large number of submissions this year, and in response the technical program was extended to 2 1/2 days. As is evident by the papers in these proceedings, many excellent submissions were made. Selecting the papers for this year’s CHES was not an easy task, and weregretthatwehadtorejectseveralveryinterstingpapersduetotheac l kof time. There were 66 submitted contributions this year, of which 31, or 47%, were selected for presentation. If we look at the number of submitted papers at CHES ’99 (42 papers) and CHES 2001 (51 papers), we observe a steady increase. We interpret this as a continuing need for a workshop series which combines theory and practice for integrating strong security features into modern communications and computer applications. In addition to the submitted contributions, Ross Anderson from Cambridge University, UK, and Adi Shamir from The Weizmann Institute, Israel, gave invited talks. As in previous years, the focus of the workshop is on all aspects of cryp- graphichardwareandembeddedsystemdesign.Ofspecialinterestwerecont- butions that describe new methods for e?cient hardware implementations and high-speed software for embedded systems, e.g., smart cards, microprocessors, DSPs, etc. CHES also continues to be an important forum for new theoretical andpractical?ndingsintheimportantandgrowing?eldofside-channelattacks.

• Cryptographic hardware
• Error-correcting Code
• FPGA-based attacks
• Windows
• complexity
• cryptoanalysis
• cryptography
• data security
• embedded systems
• finite field
• hardware implementation
• implementation
• optimization
• robust security
• secure communication

• ECE Department, Oregon State University, Corvallis, USA

  Çetin K. Koç

• Gemplus Card International, Issy les Moulineaux Cedex, France

  David Naccache

• ECE Department, Worcester Polytechnic Institute, Worcester, USA

  Christof Paar

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