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  • Conference proceedings
  • © 2000

Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation

10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000 Proceedings

Editors:

  1. Dimitrios Soudris

    1. Dept.of Electrical & Computer Engineering, Democritus University of Thrace, Xanthi, Greece

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  2. Peter Pirsch

    1. Institute for Communication Theory and Signal Processing, University of Hanover, Hanover, Germany

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    You can also search for this editor in PubMed   Google Scholar

  3. Erich Barke

    1. Institute for Microelectronic Systems, University of Hanover, Hanover, Germany

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    You can also search for this editor in PubMed   Google Scholar

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 1918)

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Table of contents (34 papers)

  1. Front Matter

    Pages I-XII
    PDF

  2. Opening

    1. Constraints, Hurdles and Opportunities for a Successful European Take-Up Action

      • Rene van Leuken, Reinder Nouta, Alexander de Graaf
      Pages 1-2

  3. RTL Power Modeling

    1. Architectural Design Space Exploration Achieved through Innovative RTL Power Estimation Techniques

      • Manuela Anton, Mauro Chinosi, Daniele Sirtori, Roberto Zafalon
      Pages 3-13

    2. Power Models for Semi-autonomous RTL Macros

      • Alessandro Bogliolo, Enrico Macii, Virgil Mihailovici, Massimo Poncino
      Pages 14-23

    3. Power Macro-Modelling for Firm-Macro

      • Gerd Jochens, Lars Kruse, Eike Schmidt, Ansgar Stammermann, Wolfgang Nebel
      Pages 24-35

    4. RTL Estimation of Steering Logic Power

      • Crina Anton, Alessandro Bogliolo, Pierluigi Civera, Ionel Colonescu, Enrico Macii, Massimo Poncino
      Pages 36-46

  4. Power Estimation and Optimization

    1. Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital Receivers

      • N.D. Zervas, S. Theoharis, A.P. Kakaroudas, D. Soudris, G. Theodoridis, C.E. Goutis
      Pages 47-55

    3. Adaptive Bus Encoding Technique for Switching Activity Reduced Data Transfer over Wide System Buses

      • Claudia Kretzschmar, Robert Siegmund, Dietmar Müller
      Pages 66-75

    4. Accurate Power Estimation of Logic Structures Based on Timed Boolean Functions

      • G. Theodoridis, S. Theoharis, N.D. Zervas, C.E. Goutis
      Pages 76-87

  5. System-Level Design

    1. A Holistic Approach to System Level Energy Optimization

      • Mary Jane Irwin, Mahmut Kandemir, N. Vijaykrishnan, Anand Sivasubramaniam
      Pages 88-107

    2. Early Power Estimation for System-on-Chip Designs

      • M. Lajolo, L. Lavagno, M. Sonza Reorda, M. Violante
      Pages 108-117

  6. Transistor-Level Modeling

    2. Impact of Voltage Scaling on Glitch Power Consumption

      • Henrik Eriksson, Per Larsson-Edefors
      Pages 139-148

    3. Degradation Delay Model Extension to CMOS Gates

      • Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia
      Pages 149-158

    4. Second Generation Delay Model for Submicron CMOS Process

      • M. Rezzoug, P. Maurine, D. Auvergne
      Pages 159-167

  7. Asynchronous Circuit Design

    1. Semi-modular Latch Chains for Asynchronous Circuit Design

      • N. Starodoubtsev, A. Bystrov, A. Yakovlev
      Pages 168-177

    2. Asynchronous First-in First-out Queues

      • Francesco Pessolano, Joep WL Kessels
      Pages 178-186

    3. Comparative Study on Self-Checking Carry-Propagate Adders in Terms of Area, Power and Performance

      • A. P. Kakaroudas, K. Papadomanolakis, V. Kokkinos, C. E. Goutis
      Pages 187-194
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Editors and Affiliations

  • Dept.of Electrical & Computer Engineering, Democritus University of Thrace, Xanthi, Greece

    Dimitrios Soudris

  • Institute for Communication Theory and Signal Processing, University of Hanover, Hanover, Germany

    Peter Pirsch

  • Institute for Microelectronic Systems, University of Hanover, Hanover, Germany

    Erich Barke

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Buy it now

eBook USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

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