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Cryptographic Hardware and Embedded Systems -- CHES 2003

5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings

  • Conference proceedings
  • © 2003

Overview

Editors:
  1. Colin D. Walter

    1. Comodo Research Lab, Bradford, UK

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  2. Çetin K. Koç

    1. Information Security Research Center, Istanbul Commerce University, Eminönü, Istanbul, Turkey

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  3. Christof Paar

    1. Horst Görtz Institute for IT Security, Ruhr University Bochum, Bochum, Germany

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 2779)

Included in the following conference series:

Conference proceedings info: CHES 2003.

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Table of contents (33 papers)

  1. Front Matter

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  2. Invited Talk

    1. The Security Challenges of Ubiquitous Computing

      • Frank Stajano
      Pages 1-1

  3. Side Channel Attack Methodology

    1. Multi-channel Attacks

      • Dakshi Agrawal, Josyula R. Rao, Pankaj Rohatgi
      Pages 2-16

    2. Hidden Markov Model Cryptanalysis

      • Chris Karlof, David Wagner
      Pages 17-34

    3. Power-Analysis Attacks on an FPGA – First Experimental Results

      • Sıddıka Berna Örs, Elisabeth Oswald, Bart Preneel
      Pages 35-50

  4. Hardware Factorization

    1. Hardware to Solve Sparse Systems of Linear Equations over GF(2)

      • Willi Geiselmann, Rainer Steinwandt
      Pages 51-61

  5. Symmetric Ciphers: Side Channel Attacks and Countermeasures

    1. Cryptanalysis of DES Implemented on Computers with Cache

      • Yukiyasu Tsunoo, Teruo Saito, Tomoyasu Suzaki, Maki Shigeri, Hiroshi Miyauchi
      Pages 62-76

    2. A Differential Fault Attack Technique against SPN Structures, with Application to the AES and Khazad

      • Gilles Piret, Jean-Jacques Quisquater
      Pages 77-88

    3. A New Algorithm for Switching from Arithmetic to Boolean Masking

      • Jean-Sébastien Coron, Alexei Tchulkine
      Pages 89-97

    4. DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits

      • Jovan D. Golić
      Pages 98-112

  6. Secure Hardware Logic

    1. Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers

      • Ramesh Karri, Grigori Kuznetsov, Michael Goessel
      Pages 113-124

    2. Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology

      • Kris Tiri, Ingrid Verbauwhede
      Pages 125-136

    3. Security Evaluation of Asynchronous Circuits

      • Jacques J. A. Fournier, Simon Moore, Huiyun Li, Robert Mullins, George Taylor
      Pages 137-151

  7. Random Number Generators

    1. Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts

      • Michael Epstein, Laszlo Hars, Raymond Krasinski, Martin Rosner, Hao Zheng
      Pages 152-165

    2. True Random Number Generators Secure in a Changing Environment

      • Boaz Barak, Ronen Shaltiel, Eran Tromer
      Pages 166-180

    3. How to Predict the Output of a Hardware Random Number Generator

      • Markus Dichtl
      Pages 181-188

  9. More on Efficient Arithmetic

    1. Efficient Exponentiation for a Class of Finite Fields GF(2n) Determined by Gauss Periods

      • Soonhak Kwon, Chang Hoon Kim, Chun Pyo Hong
      Pages 228-242
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  1. Cryptographic Hardware and Embedded Systems - CHES 2003

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Editors and Affiliations

  • Comodo Research Lab, Bradford, UK

    Colin D. Walter

  • Information Security Research Center, Istanbul Commerce University, Eminönü, Istanbul, Turkey

    Çetin K. Koç

  • Horst Görtz Institute for IT Security, Ruhr University Bochum, Bochum, Germany

    Christof Paar

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