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Power-Aware Computer Systems

Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002, Revised Papers

  • Conference proceedings
  • © 2003

Overview

Editors:
  1. Babak Falsafi

    1. Electrical and Computer Engineering, Computer Science, Carnegie Mellon University, Pittsburgh, USA

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  2. T. N. Vijaykumar

    1. School of Electrical and Computer Engineering, Purdue University, West Lafayette, USA

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    You can also search for this editor in PubMed   Google Scholar

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 2325)

Included in the following conference series:

Conference proceedings info: PACS 2002.

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Table of contents (13 papers)

  1. Front Matter

    Pages I-X
    Download chapter PDF

  2. Power-Aware Architecture/Microarchitecture

    1. Early-Stage Definition of LPX: A Low Power Issue-Execute Processor

      • P. Bose, D. Brooks, A. Buyuktosunoglu, P. Cook, K. Das, P. Emma et al.
      Pages 1-17

    2. Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints

      • Koji Inoue, Vasily Moshnyaga, Kazuaki Murakami
      Pages 18-32

    3. A Hardware Architecture for Dynamic Performance and Energy Adaptation

      • Phillip Stanley-Marbell, Michael S. Hsiao, Ulrich Kremer
      Pages 33-52

    4. Multi-Processor Computer System Having Low Power Consumption

      • C. Michael Olsen, L. Alex Morrow
      Pages 53-67

  3. Power-Aware Real-Time Systems

    1. An Integrated Heuristic Approach to Power-Aware Real-Time Scheduling

      • Pedro Mejia, Eugene Levner, Daniel Mossé
      Pages 68-83

    2. Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources

      • Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh
      Pages 84-99

    3. A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics

      • Jeongseon Euh, Jeevan Chittamuru, Wayne Burleson
      Pages 99-109

  4. Power Modeling and Monitoring

    1. Energy-Driven Statistical Sampling: Detecting Software Hotspots

      • Fay Chang, Keith I. Farkas, Parthasarathy Ranganathan
      Pages 110-129

    2. Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets

      • Xiaobo Fan, Carla S. Ellis, Alvin R. Lebeck
      Pages 130-140

    3. SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms

      • Dongkun Shin, Woonseok Kim, Jaekwon Jeon, Jihong Kim, Sang Lyul Min
      Pages 141-156

  5. Power-Aware OS and Compilers

    1. Application-Supported Device Management for Energy and Performance

      • Taliver Heath, Eduardo Pinheiro, Ricardo Bianchini
      Pages 157-178

    2. Energy-Efficient Server Clusters

      • E. N. (Mootaz) Elnozahy, Michael Kistler, Ramakrishnan Rajamony
      Pages 179-197

    3. Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches

      • Chung-Hsing Hsu, Ulrich Kremer
      Pages 197-211

  6. Back Matter

    Pages 213-213
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  1. Power-Aware Computer Systems

Keywords

Editors and Affiliations

  • Electrical and Computer Engineering, Computer Science, Carnegie Mellon University, Pittsburgh, USA

    Babak Falsafi

  • School of Electrical and Computer Engineering, Purdue University, West Lafayette, USA

    T. N. Vijaykumar

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