Software and Compilers for Embedded Systems

1. Front Matter

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2. Invited Talk

   1. The Transmeta Crusoe: VLIW Embedded in CISC

      • James C. Dehnert

      Pages 1-1

3. Code Size Reduction

   1. Limited Address Range Architecture for Reducing Code Size in Embedded Processors

      • Quin Zhao, Bart Mesman, Henk Corporaal

      Pages 2-16

   2. Predicated Instructions for Code Compaction

      • Warren Cheung, William Evans, Jeremy Moses

      Pages 17-32

   3. Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation

      • Sheayun Lee, Jaejin Lee, Sang Lyul Min, Jason Hiser, Jack W. Davidson

      Pages 33-48

4. Code Selection

   1. Code Instruction Selection Based on SSA-Graphs

      • Erik Eckstein, Oliver König, Bernhard Scholz

      Pages 49-65

   2. A Code Selection Method for SIMD Processors with PACK Instructions

      • Hiroaki Tanaka, Shinsuke Kobayashi, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai

      Pages 66-80

   3. Reconstructing Control Flow from Predicated Assembly Code

      • Björn Decker, Daniel Kästner

      Pages 81-100

5. Loop Optimizations

   1. Control Flow Analysis for Recursion Removal

      • Stefaan Himpe, Francky Catthoor, Geert Deconinck

      Pages 101-116

   2. An Unfolding-Based Loop Optimization Technique

      • Litong Song, Krishna Kavi, Ron Cytron

      Pages 117-132

   3. Tailoring Software Pipelining for Effective Exploitation of Zero Overhead Loop Buffer

      • Gang-Ryung Uh

      Pages 133-150

6. Automatic Retargeting

   1. Case Studies on Automatic Extraction of Target-Specific Architectural Parameters in Complex Code Generation

      • Yunheung Paek, Minwook Ahn, Soonho Lee

      Pages 151-166

   2. Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models

      • Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr et al.

      Pages 167-181

7. System Design

   1. A Framework for the Design and Validation of Efficient Fail-Safe Fault-Tolerant Programs

      • Arshad Jhumka, Neeraj Suri, Martin Hiller

      Pages 182-197

   2. A Case Study on a Component-Based System and Its Configuration

      • Hiroo Ishikawa, Tatsuo Nakajima

      Pages 198-210

   3. Composable Code Generation for Model-Based Development

      • Kirk Schloegel, David Oglesby, Eric Engstrom, Devesh Bhatt

      Pages 211-225

   4. Code Generation for Packet Header Intrusion Analysis on the IXP1200 Network Processor

      • Ioannis Charitakis, Dionisios Pnevmatikatos, Evangelos Markatos, Kostas Anagnostakis

      Pages 226-239

8. Register Allocation

   1. Retargetable Graph-Coloring Register Allocation for Irregular Architectures

      • Johan Runeson, Sven-Olof Nyström

      Pages 240-254

   2. Fine-Grain Register Allocation Based on a Global Spill Costs Analysis

      • Dae-Hwan Kim, Hyuk-Jae Lee

      Pages 255-269

9. Offset Assignment

   1. Unified Instruction Reordering and Algebraic Transformations for Minimum Cost Offset Assignment

      • V. V. N. S Sarvani, R. Govindarajan

      Pages 270-284

This volume contains the proceedings of the 7th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2003, held in Vienna, Austria, September 24–26, 2003. Initially, the workshop was referred to as the International Workshop on Code Generation for Embedded Systems. The ?rst workshop took place in 1994 in Schloss Dagstuhl, Germany. From its beg- nings, the intention of the organizers was to create an atmosphere in which the researcherscould participateactively in dynamic discussionsand pro?t from the assembly of international experts in the ?eld. It was at the fourth workshop, in St. Goar, Germany, in 1999, that the spectrum of topics of interest for the workshop was extended, and not only code generation, but also software and compilers for embedded systems, were considered. The change in ?elds of interest led to a change of name, and this is when the present name was used for the ?rst time. Since then, SCOPES has been held again in St. Goar, Germany, in 2001; Berlin, Germany, in 2002; and this year, 2003, in Vienna, Austria. In response to the call for papers, 43 very strong papers from all over the world were submitted. The program committee selected 26 papers for pres- tation at SCOPES 2003. All submitted papers were reviewed by at least three experts in order to ensure the quality of the work presented at the workshop.

• Compiler
• Extreme Programming
• Java
• OVal
• architecture
• code generation
• compilation
• compiler optimization
• compilers
• component systems
• control flow analysis
• embedded systems
• modeling
• optimization
• systems configuration

• Institut für Computersprachen, TU Wien, Austria

  Andreas Krall

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