Skip to main content
  • Book
  • © 2018

Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip

  • Provides novel gain-cell embedded DRAM (GC-eDRAM) designs for various low-power VLSI SoC applications;
  • Models the statistical retention time distribution of GC-eDRAM and validates the model by silicon measurements;
  • Describes various memory optimizations, including unique bitcell and assist circuits, targeted at increased retention time and reduced power consumption while hardly compromising area and speed;
  • Demonstrates several new techniques at the circuit, architectural, and algorithmic levels which enable NTV and subthreshold operation of GC-eDRAM, implementation of GC-eDRAM in aggressively scaled CMOS nodes, as well as soft-error tolerance.
  • Includes supplementary material: sn.pub/extras

Buy it now

Buying options

eBook USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 119.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

This is a preview of subscription content, log in via an institution to check for access.

Table of contents (8 chapters)

  1. Front Matter

    Pages i-ix
  2. Embedded Memories: Introduction

    • Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
    Pages 1-12
  3. Gain-Cell eDRAMs (GC-eDRAMs): Review of Basics and Prior Art

    • Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
    Pages 13-26
  4. Retention Time Modeling: The Key to Low-Power GC-eDRAMs

    • Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
    Pages 27-48
  5. Conventional GC-eDRAMs Scaled to Near-Threshold Voltage (NTV)

    • Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
    Pages 49-59
  6. Novel Bitcells and Assist Techniques for NTV GC-eDRAMs

    • Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
    Pages 61-90
  7. Aggressive Technology and Voltage Scaling (Down to the Subthreshold Domain)

    • Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
    Pages 91-111
  8. Novel Bitcells for Scaled CMOS Nodes and Soft Error Tolerance

    • Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
    Pages 113-134
  9. Conclusions

    • Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish
    Pages 135-139
  10. Back Matter

    Pages 141-146

About this book

This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.

Authors and Affiliations

  • Intel Labs, Circuit Research Lab, Intel Corporation, Hillsboro, USA

    Pascal Meinerzhagen

  • Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel

    Adam Teman, Robert Giterman, Noa Edri, Alexander Fish

  • EPFL STI IEL TCL, Lausanne, Switzerland

    Andreas Burg

About the authors

Dr. Pascal Meinerzhagen is a Senior Research Scientist at Intel Labs, Intel Corporation, performing research into energy-efficient, error-resilient circuits and systems in high-performance FinFET CMOS technology.

Dr. Adam Teman is a tenure track Senior Lecturer and co-director of the Emerging NanoScaled Integrated Circuits and Systems (EnICS) Labs in the Faculty of Engineering at Bar-Ilan Univeristy. His research interests include energy-efficient digital circuit design with an emphasis on embedded memories and efficient physical implementation of VLSI systems.

Robert Giterman is a researcher Ph.D. student at the Emerging Nanoscaled Intergrated Circuits and Systems (EnICS) Labs in Bar Ilan University, guided by Prof. Alexander Fish and Dr. Adam Teman. He received the B.Sc. degree in electrical engineering from Ben-Gurion University, Be’er Sheva, Israel, in 2013. He completed the M.Sc. degree at Ben-Gurion University in 2014 as part of a fast track program for outstanding students. Mr. Giterman’s research interests include embedded DRAM design and optimization for low power and high performance operation, SRAM design with an emphasis on improved stability, error-correction and fault-tolerant circuits and development of hardware-security oriented embedded memories for use in low-power applications and high-end processors. As part of his research, he led several full test chip integrations and tape out. He has authored/co-authored 15 journal articles and international conference papers and 3 patent applications, and has presented his research at a number of international conferences. In 2014, he was awarded the presidential scholarship for outstanding Doctorate students.

Noa Edri is a design and verification SoC engineer at Nanoscaled Intergrated Circuits and Systems (EnICS) Labs in Bar Ilan University. She received her B.Sc. in Electrical and Computer Engineering from Ben Gurion University, Israel, in 2012. She completed her M.Sc. at Bar-Ilan University in 2015 under the guidance of Prof. Alex Fish. Her M.Sc. thesis focused on embedded DRAM optimization for low power and developing system methodology for low data retention voltage in SRAM.

Prof. Andreas Burg is Professor and Director of the Telecommunications Circuits Laboratory at EPFL. His research interests range from transistor-level CMOS design (mostly for embedded memories) to energy-efficient embedded systems to the design of algorithms and architectures for VLSI Signal Processing and circuits and systems for wireless communications.

Prof. Alexander Fish is a Professor, head of the NanoElectronics Track and founder of the Emerging NanoScaled Integrated Circuits and Systems (EnICS) Labs in the Faculty of Engineering at Bar-Ilan Univeristy. His research interests include development of energy efficient “smart” CMOS image sensors, ultra low power SRAM, DRAM and Flash memory arrays and energy efficient design techniques for low voltage digital and analog VLSI chips.

 

Bibliographic Information

  • Book Title: Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip

  • Authors: Pascal Meinerzhagen, Adam Teman, Robert Giterman, Noa Edri, Andreas Burg, Alexander Fish

  • DOI: https://doi.org/10.1007/978-3-319-60402-2

  • Publisher: Springer Cham

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer International Publishing AG 2018

  • Hardcover ISBN: 978-3-319-60401-5Published: 14 July 2017

  • Softcover ISBN: 978-3-319-86855-4Published: 12 May 2018

  • eBook ISBN: 978-3-319-60402-2Published: 06 July 2017

  • Edition Number: 1

  • Number of Pages: IX, 146

  • Number of Illustrations: 84 illustrations in colour

  • Topics: Circuits and Systems, Memory Structures, Electronics and Microelectronics, Instrumentation

Buy it now

Buying options

eBook USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 119.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access