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Logic Synthesis for Finite State Machines Based on Linear Chains of States

Foundations, Recent Developments and Challenges

  • Book
  • © 2018

Overview

  • Presents original synthesis and optimization methods taking into account the peculiarities of a control algorithm and finite state machine (FSM) model in use
  • Discusses the hardware implementation of control algorithms represented by graph schemes of algorithm
  • Takes into account the peculiarities of an FSM model used for the interpretation of a control algorithm, as well as the features of hardware in use
  • Provides numerous examples showing the design of FSMs using the proposed methods
  • Includes examples illustrated by logic circuits
  • Includes supplementary material: sn.pub/extras

Part of the book series: Studies in Systems, Decision and Control (SSDC, volume 113)

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Table of contents (8 chapters)

Keywords

About this book

This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation.

This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units



Authors and Affiliations

  • Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, Zielona Góra, Poland

    Alexander Barkalov, Larysa Titarenko, Jacek Bieganowski

Bibliographic Information

  • Book Title: Logic Synthesis for Finite State Machines Based on Linear Chains of States

  • Book Subtitle: Foundations, Recent Developments and Challenges

  • Authors: Alexander Barkalov, Larysa Titarenko, Jacek Bieganowski

  • Series Title: Studies in Systems, Decision and Control

  • DOI: https://doi.org/10.1007/978-3-319-59837-6

  • Publisher: Springer Cham

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer International Publishing AG 2018

  • Hardcover ISBN: 978-3-319-59836-9Published: 06 July 2017

  • Softcover ISBN: 978-3-319-86714-4Published: 12 May 2018

  • eBook ISBN: 978-3-319-59837-6Published: 24 June 2017

  • Series ISSN: 2198-4182

  • Series E-ISSN: 2198-4190

  • Edition Number: 1

  • Number of Pages: VIII, 225

  • Number of Illustrations: 145 b/w illustrations

  • Topics: Computational Intelligence, Circuits and Systems

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